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7.7.1 Peripheral Revision and Class Information (PID)
PSC Registers
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The peripheral revision and class information (PID) register is shown in
and described in
Figure 7-3. Peripheral Revision and Class Information Register (PID)
31
30
29
28
27
16
SCHEME
Reserved
FUNC
R-1
R-0
R- 208
15
11
10
8
7
6
5
0
RTL
MAJOR
CUSTOM
MINOR
R-0
R-1
R-0
R-5
LEGEND: R/W = Read/Write, R = Read; n = value at reset
Table 7-6. Peripheral Revision and Class Information Register (PID) Field Descriptions
Bit
Field
Value
Description
31-30
SCHEME
0-3h
Scheme
29-28
Reserved
0
Reserved
27-16
FUNC
0-FFFh
Software compatible
15-11
RTL
0-1Fh
RTL Version.
10-8
MAJOR
0-7h
Major Revision.
7-6
CUSTOM
0-3h
Indicates a special version for a particular device.
5-0
MINOR
0-3Fh
Minor Revision.
Power and Sleep Controller
72
SPRUFX7 – July 2008