NXP Semiconductors MC9S08QL4, Reference Manual

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Analog-to-Digital Converter (S08ADC12V1)
MC9S08QL8 MCU Series Reference Manual, Rev. 1
128 NXP Semiconductors
10.3.2 Status and Control Register 2 (ADCSC2)
The ADCSC2 register controls the compare function, conversion trigger, and conversion active of the
ADC module.
7 6 5 4 3 2 1 0
R ADACT
ADTRG ACFE ACFGT
0 0
R
1
1
Bits 1 and 0 are reserved bits that must always be written to 0.
R
1
W
Reset: 0 0 0 0 0 0 0 0
Figure 10-3. Status and Control Register 2 (ADCSC2)
Table 10-5. ADCSC2 Register Field Descriptions
Field Description
7
ADACT
Conversion Active. Indicates that a conversion is in progress. ADACT is set when a conversion is initiated and
cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
6
ADTRG
Conversion Trigger Select. Selects the type of trigger used for initiating a conversion. Two types of triggers are
selectable: software trigger and hardware trigger. When software trigger is selected, a conversion is initiated
following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated following the assertion
of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
5
ACFE
Compare Function Enable. Enables the compare function.
0 Compare function disabled
1 Compare function enabled
4
ACFGT
Compare Function Greater Than Enable. Configures the compare function to trigger when the result of the
conversion of the input being monitored is greater than or equal to the compare value. The compare function
defaults to triggering when the result of the compare of the input being monitored is less than the compare value.
0 Compare triggers when input is less than compare value
1 Compare triggers when input is greater than or equal to compare value