NXP Semiconductors MC9S08QL4, Reference Manual

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Chapter 8 Central Processor Unit (S08CPUV5)
MC9S08QL8 MCU Series Reference Manual, Rev. 1
110 NXP Semiconductors
LDX # opr8i
LDX opr8a
LDX opr16a
LDX oprx16 ,X
LDX oprx8 ,X
LDX ,X
LDX oprx16 ,SP
LDX oprx8 ,SP
Load X (Index Register
Low) from Memory
X

(M)
0 – –
 
–
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AE
BE
CE
DE
EE
FE
9EDE
9EEE
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
LSL opr8a
LSLA
LSLX
LSL oprx8 ,X
LSL ,X
LSL oprx8 ,SP
Logical Shift Left
(Same as ASL)

– –
  
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E68
dd
ff
ff
5
1
1
5
4
6
LSR opr8a
LSRA
LSR X
LSR oprx8 ,X
LSR ,X
LSR oprx8 ,SP
Logical Shift Right

– – 0
 
DIR
INH
INH
IX1
IX
SP1
34
44
54
64
74
9E64
dd
ff
ff
5
1
1
5
4
6
MOV opr8a , opr8a
MOV opr8a ,X+
MOV # opr8i , opr8a
MOV ,X+, opr8a
Move
(M)
destination

(M)
source
H:X

(H:X) + 0x0001 in
IX+/DIR and DIR/IX+ Modes
0 – –
 
–
DIR/DIR
DIR/IX+
IMM/DIR
IX+/DIR
4E
5E
6E
7E
dd dd
dd
ii dd
dd
5
5
4
5
MUL Unsigned multiply X:A

(X)

(A)
– 0 – – – 0
INH 42 5
NEG opr8a
NEGA
NEGX
NEG oprx8 ,X
NEG ,X
NEG oprx8 ,SP
Negate
(Two’s Complement)
M

– (M) = 0x00 – (M)
A

– (A) = 0x00 – (A)
X

– (X) = 0x00 – (X)
M

– (M) = 0x00 – (M)
M

– (M) = 0x00 – (M)
M

– (M) = 0x00 – (M)

– –
  
DIR
INH
INH
IX1
IX
SP1
30
40
50
60
70
9E60
dd
ff
ff
5
1
1
5
4
6
NOP No Operation Uses 1 Bus Cycle
– – – – – –
INH 9D 1
NSA
Nibble Swap
Accumulator
A

(A[3:0]:A[7:4])
– – – – – –
INH 62 1
ORA # opr8i
ORA opr8a
ORA opr16a
ORA oprx16 ,X
ORA oprx8 ,X
ORA ,X
ORA oprx16 ,SP
ORA oprx8 ,SP
Inclusive OR Accumulator
and Memory
A

(A) | (M)
0 – –
 
–
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
AA
BA
CA
DA
EA
FA
9EDA
9EEA
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
PSHA
Push Accumulator onto
Stack
Push (A); SP

(SP ) – 0x0001
– – – – – –
INH 87 2
PSHH
Push H (Index Register
High) onto Stack
Push (H)
;
SP

(SP
) –
0x0001
– – – – – –
INH 8B 2
PSHX
Push X (Index Register
Low) onto Stack
Push (X) ; SP

(SP ) – 0x0001
– – – – – –
INH 89 2
PULA
Pull Accumulator from
Stack
SP

(SP + 0x0001); Pull

A
 – – – – – –
INH 86 3
PULH
Pull H (Index Register
High) from Stack
SP

(SP + 0x0001); Pull

H
 – – – – – –
INH 8A 3
PULX
Pull X (Index Register
Low) from Stack
SP

(SP + 0x0001); Pull

X
 – – – – – –
INH 88 3
ROL opr8a
ROLA
ROLX
ROL oprx8 ,X
ROL ,X
ROL oprx8 ,SP
Rotate Left through Carry

– –
  
DIR
INH
INH
IX1
IX
SP1
39
49
59
69
79
9E69
dd
ff
ff
5
1
1
5
4
6
Table 8-2. HCS08 Instruction Set Summary (Sheet 5 of 7)
Source
Form
Operation Description
Effect
on CCR
Addre
ss
Mode
Op
co
de
Op
eran
d
Bu
s
C
ycl
es
1
V H I N Z C
C
b0 b7
0
b0
b7
C 0
C
b0 b7