Chapter 8 Central Processor Unit (S08CPUV5)
MC9S08QL8 MCU Series Reference Manual, Rev. 1
NXP Semiconductors
105
0
=
Bit forced to 0
1
=
Bit forced to 1
=
Bit set or cleared according to results of operation
U
=
Undefined after the operation
Machine coding notation
dd
=
Low-order 8 bits of a direct address 0x0000–0x00FF (high byte assumed to be 0x00)
ee
=
Upper 8 bits of 16-bit offset
ff
=
Lower 8 bits of 16-bit offset or 8-bit offset
ii
=
One byte of immediate data
jj
=
High-order byte of a 16-bit immediate data value
kk
=
Low-order byte of a 16-bit immediate data value
hh
=
High-order byte of 16-bit extended address
ll
=
Low-order byte of 16-bit extended address
pg
=
Page
rr
=
Relative offset
Source form
Everything in the source forms columns,
except expressions in italic characters,
is literal information that
must appear in the assembly source file exactly as shown. The initial 3- to 5-letter mnemonic is always a
literal expression. All commas, pound signs (#), parentheses, and plus signs (+) are literal characters.
n
—
Any label or expression that evaluates to a single integer in the range 0–7
opr8i
—
Any label or expression that evaluates to an 8-bit immediate value
opr16i
—
Any label or expression that evaluates to a 16-bit immediate value
opr8a
—
Any label or expression that evaluates to an 8-bit value. The instruction treats this 8-bit
value as the low order 8 bits of an address in the direct page of the 64-Kbyte address
space (0x00xx).
opr16a
—
Any label or expression that evaluates to a 16-bit value. The instruction treats this
value as an address in the 64-Kbyte address space.
oprx8
—
Any label or expression that evaluates to an unsigned 8-bit value, used for indexed
addressing
oprx16
—
Any label or expression that evaluates to a 16-bit value. Because the HCS08 has a
16-bit address bus, this can be either a signed or an unsigned value.
page
—
Any label or expression that evaluates to a valid bank number for the PPAGE register.
rel
—
Any label or expression that refers to an address that is within –128 to +127 locations
from the next address after the last byte of object code for the current instruction. The
assembler will calculate the 8-bit signed offset and include it in the object code for this
instruction.
Address modes
INH
=
Inherent (no operands)
IMM
=
8-bit or 16-bit immediate
Summary of Contents for MC9S08QL4
Page 4: ...MC9S08QL8 MCU Series Reference Manual Rev 1 4 NXP Semiconductors...
Page 36: ...Chapter 3 Modes of Operation MC9S08QL8 MCU Series Reference Manual Rev 1 36 NXP Semiconductors...
Page 56: ...Chapter 4 Memory MC9S08QL8 MCU Series Reference Manual Rev 1 56 NXP Semiconductors...
Page 172: ...Modulo Timer S08MTIMV1 MC9S08QL8 MCU Series Reference Manual Rev 1 172 NXP Semiconductors...
Page 238: ...Development Support MC9S08QL8 MCU Series Reference Manual Rev 1 238 NXP Semiconductors...
Page 239: ......