NXP Semiconductors MC9S08QL4, Reference Manual

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MC9S08QL8 MCU Series Reference Manual, Rev. 1
8 NXP Semiconductors
8.3 Addressing Modes ...........................................................................................................................99
8.3.1 Inherent Addressing Mode (INH) .....................................................................................99
8.3.2 Relative Addressing Mode (REL) .....................................................................................99
8.3.3 Immediate Addressing Mode (IMM) ................................................................................99
8.3.4 Direct Addressing Mode (DIR) .........................................................................................99
8.3.5 Extended Addressing Mode (EXT) .................................................................................100
8.3.6 Indexed Addressing Mode ..............................................................................................100
8.4 Special Operations .........................................................................................................................101
8.4.1 Reset Sequence ...............................................................................................................101
8.4.2 Interrupt Sequence ..........................................................................................................101
8.4.3 Wait Mode Operation ......................................................................................................102
8.4.4 Stop Mode Operation ......................................................................................................102
8.4.5 BGND Instruction ...........................................................................................................103
8.5 HCS08 Instruction Set Summary ..................................................................................................104
Chapter 9
Analog Comparator (S08ACMPVLPV1)
9.1 Introduction ...................................................................................................................................115
9.1.1 ACMP Configuration Information ..................................................................................115
9.1.2 ACMP/TPM Configuration Information ........................................................................115
9.1.3 ACMP Clock Gating .......................................................................................................115
9.1.4 Stop1 Not Available ........................................................................................................115
9.1.5 Features ...........................................................................................................................116
9.1.6 Modes of Operation ........................................................................................................116
9.1.7 Block Diagram ................................................................................................................116
9.2 External Signal Description ..........................................................................................................117
9.3 Register Definition ........................................................................................................................117
9.3.1 Status and Control Register (ACMPxSC) ......................................................................117
9.4 Functional Description ..................................................................................................................118
9.5 Interrupts .......................................................................................................................................118
Chapter 10
Analog-to-Digital Converter (S08ADC12V1)
10.1 Introduction ...................................................................................................................................121
10.1.1 ADC Clock Gating ..........................................................................................................121
10.1.2 Module Configurations ...................................................................................................121
10.1.3 Features ...........................................................................................................................124
10.1.4 ADC Module Block Diagram .........................................................................................124
10.2 External Signal Description ..........................................................................................................125
10.2.1 Analog Power (V
DDA
) ....................................................................................................126
10.2.2 Analog Ground (V
SSA
) ...................................................................................................126
10.2.3 Voltage Reference High (V
REFH
) ...................................................................................126
10.2.4 Voltage Reference Low (V
REFL
) ....................................................................................126
10.2.5 Analog Channel Inputs (ADx) ........................................................................................126
10.3 Register Definition ........................................................................................................................126