Chapter 2 Pins and Connections
MC9S08QL8 MCU Series Reference Manual, Rev. 1
20
NXP Semiconductors
2.4
Pin Detail
This section provides a detailed description of system connections.
2.4.1
Power Pins
V
DD
and V
SS
are the primary power supply pins for the MCU. This voltage source supplies power to all
I/O buffer circuitry and to an internal voltage regulator. The internal voltage regulator provides a regulated
lower-voltage source for the CPU and other internal circuitry of the MCU.
Typically, application systems have two separate capacitors across the power pins. In this case, there must
be a bulk electrolytic capacitor, such as a 10-
F tantalum capacitor, to provide bulk charge storage for the
overall system and a 0.1-
F ceramic bypass capacitor located as near to the MCU power pins as practical
to suppress high-frequency noise.
V
DDA
and V
SSA
are the analog power supply pins for the MCU. This voltage source supplies power to the
ADC and ACMP modules.
The V
REFH
and V
REFL
pins are the voltage reference high and voltage reference low inputs, respectively
for the ADC module. For this MCU, V
DDA
shares the V
REFH
pin and they are double bonded to the V
DD
pin. For this MCU, V
SSA
shares the V
REFL
pin, and they are double bonded to the V
SS
pin.
2.4.2
Oscillator
Immediately after reset, the MCU uses an internally generated clock provided by the internal clock source
(ICS) module. The oscillator can be configured to run in stop2 or stop3 modes. For more information on
the ICS, see
Chapter 11, Internal Clock Source (S08ICSV3)
.
The oscillator (XOSCVLP) in this MCU is a Pierce oscillator that can accommodate a crystal or ceramic
resonator. An external clock source can optionally be connected to the EXTAL input pin.
Refer to
for the following discussion. R
S
(when used) and R
F
must be low-inductance resistors
such as carbon composition resistors. Wire-wound resistors and some metal film resistors have too much
inductance. C1 and C2 normally must be high-quality ceramic capacitors that are specifically designed for
high-frequency applications.
R
F
provides a bias path to keep the EXTAL input in its linear range during crystal startup; its value is not
generally critical. Typical systems use 1 M
to 10 M
. Higher values are sensitive to humidity and lower
values reduce gain and (in extreme cases) could prevent startup.
C1 and C2 are typically in the 5 pF to 25 pF range and are chosen to match the requirements of a specific
crystal or resonator. Be sure to consider printed circuit board (PCB) capacitance and MCU pin capacitance
when selecting C1 and C2. The crystal manufacturer typically specifies a load capacitance which is the
series combination of C1 and C2 (which are usually the same size). As a first-order approximation, use
10 pF as an estimate of combined pin and PCB capacitance for each oscillator pin (EXTAL and XTAL).
When using the oscillator in low range and low gain mode, the external components R
S
, R
F
, C
1
and C
2
are
not required.
Summary of Contents for MC9S08QL4
Page 4: ...MC9S08QL8 MCU Series Reference Manual Rev 1 4 NXP Semiconductors...
Page 36: ...Chapter 3 Modes of Operation MC9S08QL8 MCU Series Reference Manual Rev 1 36 NXP Semiconductors...
Page 56: ...Chapter 4 Memory MC9S08QL8 MCU Series Reference Manual Rev 1 56 NXP Semiconductors...
Page 172: ...Modulo Timer S08MTIMV1 MC9S08QL8 MCU Series Reference Manual Rev 1 172 NXP Semiconductors...
Page 238: ...Development Support MC9S08QL8 MCU Series Reference Manual Rev 1 238 NXP Semiconductors...
Page 239: ......