NXP Semiconductors MC9S08QL4, Reference Manual

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MC9S08QL8 MCU Series Reference Manual, Rev. 1
NXP Semiconductors 115
Chapter 9
Analog Comparator (S08ACMPVLPV1)
9.1 Introduction
MC9S08QL8 series MCUs have one analog comparator, named ACMP.
The analog comparator module (ACMP) provides a circuit for comparing two analog input voltages or for
comparing one analog input voltage to an internal reference voltage. The comparator circuit is designed to
operate across the full range of the supply voltage (rail-to-rail operation).
The ACMP option to compare to internal bandgap reference is not allowed in LPRUN and LPWAIT.
9.1.1 ACMP Configuration Information
When using the bandgap reference voltage for input to ACMP+, the user must enable the bandgap buffer
by setting BGBE = 1 in SPMSC1 see
Section 5.8.7, System Power Management Status and Control 1
Register (SPMSC1) for value of bandgap voltage reference see the data sheet.
BKGDPE bit in SOPT1 register is set following any reset of the MCU and must be cleared to use the
PTA4/ACMPO/BKGD/MS pin’s alternative pin functions.
9.1.2 ACMP/TPM Configuration Information
The ACMP module can be configured to connect the output of the analog comparator to the TPM input
capture channel 0 by setting the ACIC bit in SOPT2. With ACIC set, the TPMCH0 pin is not available
externally regardless of the configuration of the TPM module.
9.1.3 ACMP Clock Gating
The bus clock to the ACMP can be gated on and off using the ACMP bit in SCGC2. This bit is set after
any reset, which enables the bus clock to this module. To conserve power, the ACMP bit can be cleared to
disable the clock to this module when not in use. See
Section 5.7, Peripheral Clock Gating for details.
9.1.4 Stop1 Not Available
Stop1 is not available on this MCU. Therefore, ignore references the stop1 within this chapter.