NXP Semiconductors K22F series, Reference Manual, Page: 731 / 1407

31.4.12.4 32-bit-Write burst to 8-Bit port 3-1-1-1 (no wait states)
The following figure shows a 32-bit write to an 8-bit external chip with burst enabled.
The transfer results in a 4-beat burst and the data is driven on FB_AD[31:24]. The
transfer size is driven at 32-bit (00b) throughout the bus cycle.
Note
The first beat of any write burst cycle has at least one wait state.
If the bus cycle is programmed for zero wait states
(CSCRn[WS] = 0b), one wait state is added. Otherwise, the
programmed number of wait states are used.
Address
Address Data
Add+1 Add+2 Add+3
FB_CLK
FB_TBST
TSIZ=00
AA=1
AA=0
FB_RW
FB_TS
FB_ALE
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
AA=1
AA=0
FB_CSn
32-bit Write Burst to 8-bit port 3-1-1-1, with no wait states
S0 S2 S2 S2 S3 S0
TIP
AA=1
AA=0
W
rit
e32bBur
st31
11
.s
vg
If AA=1, the address increments
If AA=0, the address stays the same
S1 S2
Data Data Data
S0 S2 S2 S2 S3 S0 S1 S2
Figure 31-23. 32-bit-Write burst to 8-Bit port 3-1-1-1 (no wait states)
Chapter 31 External Bus Interface (FlexBus)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 731