NXP Semiconductors K22F series, Reference Manual, Page: 431 / 1407

DMA memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_801A Clear Enable Request Register (DMA_CERQ) 8
W
(always
reads 0)
00h 22.3.11/452
4000_801B Set Enable Request Register (DMA_SERQ) 8
W
(always
reads 0)
00h 22.3.12/453
4000_801C Clear DONE Status Bit Register (DMA_CDNE) 8
W
(always
reads 0)
00h 22.3.13/454
4000_801D Set START Bit Register (DMA_SSRT) 8
W
(always
reads 0)
00h 22.3.14/455
4000_801E Clear Error Register (DMA_CERR) 8
W
(always
reads 0)
00h 22.3.15/456
4000_801F Clear Interrupt Request Register (DMA_CINT) 8
W
(always
reads 0)
00h 22.3.16/457
4000_8024 Interrupt Request Register (DMA_INT) 32 R/W 0000_0000h 22.3.17/458
4000_802C Error Register (DMA_ERR) 32 R/W 0000_0000h 22.3.18/460
4000_8034 Hardware Request Status Register (DMA_HRS) 32 R 0000_0000h 22.3.19/463
4000_8044
Enable Asynchronous Request in Stop Register
(DMA_EARS)
32 R/W 0000_0000h 22.3.20/466
4000_8100 Channel n Priority Register (DMA_DCHPRI3) 8 R/W See section 22.3.21/468
4000_8101 Channel n Priority Register (DMA_DCHPRI2) 8 R/W See section 22.3.21/468
4000_8102 Channel n Priority Register (DMA_DCHPRI1) 8 R/W See section 22.3.21/468
4000_8103 Channel n Priority Register (DMA_DCHPRI0) 8 R/W See section 22.3.21/468
4000_8104 Channel n Priority Register (DMA_DCHPRI7) 8 R/W See section 22.3.21/468
4000_8105 Channel n Priority Register (DMA_DCHPRI6) 8 R/W See section 22.3.21/468
4000_8106 Channel n Priority Register (DMA_DCHPRI5) 8 R/W See section 22.3.21/468
4000_8107 Channel n Priority Register (DMA_DCHPRI4) 8 R/W See section 22.3.21/468
4000_8108 Channel n Priority Register (DMA_DCHPRI11) 8 R/W See section 22.3.21/468
4000_8109 Channel n Priority Register (DMA_DCHPRI10) 8 R/W See section 22.3.21/468
4000_810A Channel n Priority Register (DMA_DCHPRI9) 8 R/W See section 22.3.21/468
4000_810B Channel n Priority Register (DMA_DCHPRI8) 8 R/W See section 22.3.21/468
4000_810C Channel n Priority Register (DMA_DCHPRI15) 8 R/W See section 22.3.21/468
4000_810D Channel n Priority Register (DMA_DCHPRI14) 8 R/W See section 22.3.21/468
4000_810E Channel n Priority Register (DMA_DCHPRI13) 8 R/W See section 22.3.21/468
4000_810F Channel n Priority Register (DMA_DCHPRI12) 8 R/W See section 22.3.21/468
4000_9000 TCD Source Address (DMA_TCD0_SADDR) 32 R/W Undefined 22.3.22/469
4000_9004 TCD Signed Source Address Offset (DMA_TCD0_SOFF) 16 R/W Undefined 22.3.23/469
4000_9006 TCD Transfer Attributes (DMA_TCD0_ATTR) 16 R/W Undefined 22.3.24/470
Table continues on the next page...
Chapter 22 Enhanced Direct Memory Access (eDMA)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors 431