NXP Semiconductors K22F series, Reference Manual, Page: 1268 / 1407

To locate the start bit, data recovery logic does an asynchronous search for a logic 0
preceded by three logic 1s. When the falling edge of a possible start bit occurs, the RT
clock begins to count to 16.
SAMPLES
Rx pin input
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
1 1 1 1 0
START BIT
LSB
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T2
R
T3
R
T4
R
T5
R
T6
R
T2
R
T3
R
T4
R
T7
R
T8
R
T9
R
T1
1
R
T1
3
R
T1
4
R
T1
5
R
T1
6
1 1 1 1 0 0 0 0 0 0
R
T1
0
R
T1
2
R
T1
START BIT
QUALIFICATION
DATA
SAMPLING
START BIT
VERIFICATION
Figure 47-4. Receiver data sampling
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5,
and RT7 when C7816[ISO_7816E] is cleared/disabled and RT8, RT9 and RT10 when
C7816[ISO_7816E] is set/enabled. The following table summarizes the results of the start
bit verification samples.
Table 47-4. Start bit verification
RT3, RT5, and RT7 samples
RT8, RT9, RT10 samples when 7816E
Start bit verification Noise flag
000 Yes 0
001 Yes 1
010 Yes 1
011 No 0
100 Yes 1
101 No 0
110 No 0
111 No 0
If start bit verification is not successful, the RT clock is reset and a new search for a start
bit begins.
To determine the value of a data bit and to detect noise, recovery logic takes samples at
RT8, RT9, and RT10. The following table summarizes the results of the data bit samples.
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1268 NXP Semiconductors