NXP Semiconductors K22F series, Reference Manual, Page: 1276 / 1407

47.4.2.9.1 Slow data tolerance
The following figure shows how much a slow received frame can be misaligned without
causing a noise error or a framing error. The slow stop bit begins at RT8 instead of RT1
but arrives in time for the stop bit data samples at RT8, RT9, and RT10.
RECEIVER
RT CLOCK
MSB STOP
DATA
SAMPLES
RT
16
RT
15
RT
14
RT
13
RT1
2
RT
11
RT1
0
RT9 RT8 RT7 RT6 RT5 RT4 RT3 RT2 RT1
Figure 47-12. Slow data
For an 8-bit data character, data sampling of the stop bit takes the receiver 154 RT cycles
(9 bit times × 16 RT 10 RT cycles).
With the misaligned character shown in the Figure 47-12 , the receiver counts 154 RT
cycles at the point when the count of the transmitting device is 147 RT cycles (9 bit times
× 16 RT 3 RT cycles).
The maximum percent difference between the receiver count and the transmitter count of
a slow 8-bit data character with no errors is:
((154 − 147) ÷ 154) × 100 = 4.54%
For a 9-bit data character, data sampling of the stop bit takes the receiver 170 RT cycles
(10 bit times × 16 RT 10 RT cycles).
With the misaligned character shown in the Figure 47-12 , the receiver counts 170 RT
cycles at the point when the count of the transmitting device is 163 RT cycles (10 bit
times × 16 RT 3 RT cycles).
The maximum percent difference between the receiver count and the transmitter count of
a slow 9-bit character with no errors is:
((170 − 163) ÷ 170) × 100 = 4.12%
47.4.2.9.2 Fast data tolerance
The following figure shows how much a fast received frame can be misaligned. The fast
stop bit ends at RT10 instead of RT16 but is still sampled at RT8, RT9, and RT10.
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1276 NXP Semiconductors