NXP Semiconductors K22F series, Reference Manual, Page: 1334 / 1407

Idle-line wakeup and idle match operation are also affected by the CTRL[IDLECFG]
field. When address match or match on/off operation is enabled, setting the
STAT[RWUID] bit will cause any discarded characters to be treated as if they were idle
characters.
48.3.4.3 Loop mode
When LPUART_CTRL[LOOPS] is set, the LPUART_CTRL[RSRC] bit in the same
register chooses between loop mode (LPUART_CTRL[RSRC] = 0) or single-wire mode
(LPUART_CTRL[RSRC] = 1). Loop mode is sometimes used to check software,
independent of connections in the external system, to help isolate system problems. In
this mode, the transmitter output is internally connected to the receiver input and the
LPUART_RX pin is not used by the LPUART.
48.3.4.4 Single-wire operation
When LPUART_CTRL[LOOPS] is set, the RSRC bit in the same register chooses
between loop mode (LPUART_CTRL[RSRC] = 0) or single-wire mode
(LPUART_CTRL[RSRC] = 1). Single-wire mode implements a half-duplex serial
connection. The receiver is internally connected to the transmitter output and to the
LPUART_TX pin (the LPUART_RX pin is not used).
In single-wire mode, the LPUART_CTRL[TXDIR] bit controls the direction of serial
data on the LPUART_TX pin. When LPUART_CTRL[TXDIR] is cleared, the
LPUART_TX pin is an input to the receiver and the transmitter is temporarily
disconnected from the LPUART_TX pin so an external device can send serial data to the
receiver. When LPUART_CTRL[TXDIR] is set, the LPUART_TX pin is an output
driven by the transmitter, the internal loop back connection is disabled, and as a result the
receiver cannot receive characters that are sent out by the transmitter.
48.3.5 Infrared interface
The LPUART provides the capability of transmitting narrow pulses to an IR LED and
receiving narrow pulses and transforming them to serial bits, which are sent to the
LPUART. The IrDA physical layer specification defines a half-duplex infrared
communication link for exchanging data. The full standard includes data rates up to 16
Mbits/s. This design covers data rates only between 2.4 kbits/s and 115.2 kbits/s.
Functional description
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1334 NXP Semiconductors