NXP Semiconductors K22F series, Reference Manual, Page: 1218 / 1407

Setting C1[UARTSWAI] does not affect the state of the C2[RE] or C2[TE].
If C1[UARTSWAI] is set, any ongoing transmission or reception stops at the Wait mode
entry. The transmission or reception resumes when either an internal or external interrupt
brings the CPU out of Wait mode. Bringing the CPU out of Wait mode by reset aborts
any ongoing transmission or reception and resets the UART.
47.1.2.3 Stop mode
The UART is inactive during Stop mode for reduced power consumption. The STOP
instruction does not affect the UART register states, but the UART module clock is
disabled. The UART operation resumes after an external interrupt brings the CPU out of
Stop mode. Bringing the CPU out of Stop mode by reset aborts any ongoing transmission
or reception and resets the UART. Entering or leaving Stop mode does not initiate any
power down or power up procedures for the ISO-7816 smartcard interface.
47.2 UART signal descriptions
The UART signals are shown in the following table.
Table 47-1. UART signal descriptions
Signal Description I/O
CTS Clear to send I
RTS Request to send O
RXD Receive data I
TXD Transmit data O
47.2.1 Detailed signal descriptions
The detailed signal descriptions of the UART are shown in the following table.
Table 47-2. UART—Detailed signal descriptions
Signal I/O Description
CTS I Clear to send. Indicates whether the UART can start transmitting data when flow control is
enabled.
State meaning Asserted—Data transmission can start.
Negated—Data transmission cannot start.
Timing
Assertion—When transmitting device's RTS asserts.
Table continues on the next page...
UART signal descriptions
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
1218 NXP Semiconductors