Appendix C
Test Patterns and Loop Codes
Test patterns
CT-650 Command-Line Reference Guide
Release 9.4
195
X
X
LUP T1_5
Fixed 53-octet pattern. Used to stress T1 repeater equalization
and ALBO circuitry. Pattern consists of rapid transitions from
high ones density octets to low ones density octets. When frame
aligned, pattern does not exceed the maximum zeros criteria, but
does exceed the 8(n+1) ones density criteria. Transmit pattern
over repeatered span only and not the network. Refer to
for specific test pattern sequence.
X
X
LUP T1_6
Fixed unframed 55-octet pattern (variant of MIN/MAX pattern).
Used to stress repeater timing recovery and ALBO circuitry. Pat-
tern consists of rapid transitions from high ones density octets to
low ones density octets. When frame aligned, pattern violates
the maximum zeros and ones density criteria. Transmit pattern
over repeatered span only and not the network. Refer to
for specific test pattern sequence.
X
X
LUP
T1_DALY
Fixed framed or unframed 55-octet pattern (except seventh octet
is 80H instead of 00H). Pattern meets ones density and excess
zeros criteria to test timing recovery circuits. Refer to
for specific test pattern sequence.
X
Multipat
Automated multipattern test generates five commonly used test
patterns to test a T1 span without having to select each test pat-
tern individually. The CT-650 monitors the received test patterns
for bit errors, BPVs, and frame errors. This sequence takes
about 15 minutes to transmit. Refer to
specific test pattern sequence.
X
X
Pat_Sensit
ive DDS1
200 octet minimum/maximum ones density test pattern which is
used to stress DDS circuit signal recovery capability. DDS1 is a
repeating pattern of 100 octets of 1111 1111 and 100 octets of
0000 0000.
X
X
Pat_Sensit
ive DDS2
200 octet minimum ones density test pattern which is used to
simulate bit-oriented protocol flags (e.g., HDLC) to ensure DDS
circuits can pass the signal properly. DDS2 is a repeating pattern
of 100 octets of 0111 1110 and 100 octets of 0000 0000.
X
X
Pat_Sensit
ive DDS3
Single octet medium ones density test pattern which is used to
simulate a typical signal transmitted over a DDS circuit. DDS3 is
a continuous series of octets of 0100 1100….
Table 12
Digital test patterns (Continued)
DS3
DS1
FT1
DD
S
Pattern
Description
Summary of Contents for CT-650
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