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AT32WB415
Series Reference Manual
2022.04.13
Page 51
Ver 2.00
0: OFF.
1: ON
Bit 15: 8
HICKCAL
0xXX
rw
High speed internal clock calibration
The default value of this field is the initial factory calibration
value.
When the HICK output frequency is 48 MHz, it needs
adjust 240 kHz (design value) based on this frequency for
each HICKCAL value change; when HICK output frequency
is 8 MHz (design value), it needs adjust 40 kHz based on
this frequency for each HICKCAL value change.
Note: This bit can be written only if the HICKCAL_KEY[7: 0]
is set as 0x5A.
Bit 7: 2
HICKTRIM
0x20
rw
High speed internal clock trimming
These bits work with the HICKCAL[7: 0] to determine the
HICK oscillator frequency. The default value is 32, which
can trim the HICK to be ±1%.
Bit 1
HICKSTBL
0x1
ro
High speed internal clock stable
This bit is set by hardware after the HICK is ready.
0: Not ready
1: Ready
Bit 0
HICKEN
0x1
rw
High speed internal clock enable
This bit is set and cleared by software. It can also be set by
hardware when exiting Standby or Deepsleep mode. When
a HEXT clock failure occurs. This bit can also be set. When
the HICK is used as the sytem clock, this bit cannot be
cleared.
0: Disabled
1: Enabled
4.3.2
Clock configuration register (CRM_CFG)
Access: 0 to 2 wait states, accessible by bytes, half-words or words. 1 or 2 wait states are inserted only
when the access occurs during a clock source switch.
Bit
Name
Reset value
Type
Description
Bit 31
Reserved
0x0
resd
Kept at its default value.
Bit 26:24
CLKOUT_SEL 0x0
rw
Clock output selection
CLKOUT_SEL[3] is the bit 16 of the CRM_MISC1 register.
0000: None
0001: Reser ved
0010: LICK
0011: LEXT
0100: SCLK
0101: HICK
0110: HEXT
0111: PLL/2
1100: PLL/4
1101: USB
1110: ADC
Bit 27
Bit 23: 22
USBDIV
0x0
rw
USB division
The PLL clock after division is used as USB clock.
000: PLL/1.5
001: Forbidden
010: PLL/2.5
011: PLL/2
100: PLL/3.5
101: PLL/3
110: PLL/4
111: PLL/4
Bit 30: 29
Bit 21: 18
PLLMULT
0x00
rw
PLL multiplication factor
000000: PLL x 2 000001: PLL x 3
000010: PLL x 4 000011: PLL x 5
……
001100: PLL x 14 001101: PLL x 15
001110: PLL x 16 001111: PLL x 16
010000: PLL x 17 010001: PLL x 18