R3267 Series Spectrum Analyzer Operation Manual (Vol.1)
5.2.8 Status Bytes
5-19
The table below explains the meanings of the bits in the status byte register.
Bit
Function
Description
7
OPR
The OPR bit is a summary of the standard operation
status register
6
MSS
The RQS bit is true when the MSS bit of the status
byte register is set to 1. The MSS bit is the summary
bit for the entire status data structure.
The serial poll cannot read out the MSS bit. (How-
ever, the MSS bit is understood to be 1 when the RQS
bit is 1.)
To read the MSS bit, use the common command
*STB?. The *STB? command can read out bit 0 to 5
and bit 7 of the status byte register and the MSS bit.
In this case, neither the status byte register nor the
MSS bit can be cleared.
The MSS bit cannot become 0 until all the unmasked
factors in the status register structure have been
cleared
5
ESB
The ESB bit is a summary of the standard event regis-
ter
4
MAV
Summary bit for the output buffer.
The analyzer does not use this bit.
3 to 1
This is always 0
0
UCAL
This is set to 1 when an signal level error occurs
because the sweep is too fast
