Section 15 Serial I/O with FIFO (SIOF)
Rev. 2.00 Mar 09, 2006 page 655 of 906
REJ09B0292-0200
A[7]
A[6]
A[5]
A[0]
B[7]
B[6]
B[5]
B[4]
B[7]
A[7]
A[7:0]
A[7:0]
B[7:6]
B[7:5]
A[7:6]
A[7:1]
Undefined
SRXD
SRS
SRCK
SIRSR
SIRDR
RDRF
Note: DL = 0: 8-bit data transfer
SE = 0: Asynchronous transfer, no start signal mode
LM = 0: MSB first
TRMD = 0: LSB of transmitted primary data is value in SITDR
Set to 1 when an amount of
data equal to or greater than the
setting of bits RFWM3 to RFWM0
in SIFCR is received
Synchronous internal clock
Figure 15.3 Reception: Continuous Transfer Mode/MSB First
Содержание SH7616
Страница 10: ...Rev 2 00 Mar 09 2006 page x of xxvi ...
Страница 132: ...Section 2 CPU Rev 2 00 Mar 09 2006 page 106 of 906 REJ09B0292 0200 ...
Страница 568: ...Section 12 16 Bit Free Running Timer FRT Rev 2 00 Mar 09 2006 page 542 of 906 REJ09B0292 0200 ...
Страница 582: ...Section 13 Watchdog Timer WDT Rev 2 00 Mar 09 2006 page 556 of 906 REJ09B0292 0200 ...
Страница 662: ...Section 14 Serial Communication Interface with FIFO SCIF Rev 2 00 Mar 09 2006 page 636 of 906 REJ09B0292 0200 ...
Страница 706: ...Section 16 Serial I O SIO Rev 2 00 Mar 09 2006 page 680 of 906 REJ09B0292 0200 ...
Страница 820: ...Section 19 Pin Function Controller PFC Rev 2 00 Mar 09 2006 page 794 of 906 REJ09B0292 0200 ...
Страница 932: ...Appendix D Package Dimensions Rev 2 00 Mar 09 2006 page 906 of 906 REJ09B0292 0200 ...
Страница 935: ...SH7616 Hardware Manual ...