Tektronix 492, 492P Service Manual Download Page 9

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492/492P Service Vol. I (SN B030000 & up)

LIST OF ILLUSTRATIONS (cont)

Fig.

Fig·

No.

Page

No.

Page

5-7

Simplified block diagram of the phaselock

5-33

Flow chart of the 6800 main decision

circuits.......................................................

5-17

paths....................................................... .

5-82

5-8

Bridged T attenuator equivalent schematic

5-21

5-34

6821 PIA registers and control lines...........

5-84

5-9

Three-stage log amplifier............................

5-30

5-35

A 6800 write to the instrument b u s ...........

5-87

5-10

Log amplifier gain curve showing

5-36

Instrument bus poll sequence....................

5-88

breakpoint.................................................

5-30

ς-37

Scan by simplified keyboard encoder........

5-89

5-11

Ends of logging range...............................

5-30

5-38

Keyboard encoder.....................................

5-90

5-12

Simplified detector circu it..........................

5-32

5-39

Switch matrix codes.................................

5-92

5-13

Selection of display position on log scale..

5-33

5-40

Frequency control encoder timing..............

5-93

5-14

Video filter simplified schematic................

5-37

5-41

Primary regulator input and output

5-15

Vertical control IC block diagram ..............

5-40

waveforms (stylized).................................

5-96

5-16

Horizontal control IC block diagram..........

5-44

5-42

Timing waveforms (stylized) for soft-start

5-17

Simplified crt readout block diagram ........

5-48

circuit........................................................

5-97

5-18

Character on/off timing..............................

5-49

5-43

9914 GPIA block diagram.........................

5-100

5-19

Character scan.........................................

5-50

6 - 1

Hardware provided for slide track

5-20

Character generator (U1028) block diagram

5-51

mounting...................................................

6-3

5-21

Character scan timing...............................

5-52

6 - 2

Instrument installed in a cabinet-type

5-22

Dot delay circuit tim ing..............................

5-53

6-4

5-23

Frequency dot marker circuit and timing ..

5-54

6-3

Complete slide-out track assemblies........

6-5

5-24

Sweep "interrupt" circuits..........................

5-59

6-4

Method of mounting the stationary

5-25

Simplified digital-to-analog converter........

5-60

sections.....................................................

6 - 6

5-26

Simplified span decade attenuator............

5-61

6-5

Measurements of front-rail mounting

5-27

DAC variance graph.................................

5-67

holes for the stationary sections................

6-7

5-28

Basic tune voltage converter....................

5-68

6 - 6

Procedure for inserting or removing

5-29

Timing diagram for F ERROR count..........

5-73

the instrument...........................................

6 - 8

5-30

Simple Logic diagram of processor clock..

5-79

6-7

Alignment adjustment for correct

5-31

Block diagram of 6800 microprocessor . . .

5-80

operation...................................................

6-9

5-32

Read and write cycle timing on the

6 - 8

Alternative method of installing the

microcomputer bus...................................

5-81

instrument using rear support brackets . . .

6 - 1 0

Summary of Contents for 492, 492P

Page 1: ...ARE FOR USE BY QUALIFIED PERSONNEL ONLY TO AVOID PERSONAL INJURY DO NOT PERFORM ANY SERVICING OTHER THAN THAT CONTAINED IN OPERATING INSTRUCTIONS UNLESS YOU ARE QUALIFIED TO DO SO REFER TO OPERATORS SAFETY SUMMARY AND SERVICE SAFETY SUMMARY PRIOR TO PERFORMING ANY SERVICE Please Check for CHANGE INFORMATION at the Rear of This Manual First Printing FEB 1981 Revised FEB 1984 Tfektronix COMMITTED TO...

Page 2: ... 0 8 1 18 Option 2 0 1 18 Option 2 1 1 19 Option 2 2 1 19 Options 30 31 32 1 19 Options for power cord configurations 1 2 0 Page Section 2 INSTALLATION AND REPACKAGING Introduction 2 1 Unpackaging and Initial Inspection 2 1 Preparation for U se 2 1 Power Source and Power Requirements 2 1 Repackaging for Shipment 2 2 Section 3 CALIBRATION Introduction 3 1 History Information 3 1 Equipment Required ...

Page 3: ...3 34 Performance Checks and DJUSTMENT PROCEDURE 3 42 Recalibration 4 3 1 Check and Adjust Low Voltage TROUBLESHOOTING 4 3 Power Supply 3 43 Troubleshooting Aids 4 3 2 Crt Display Z Axis High Voltage General Troubleshooting boards 3 44 Techniques 4 5 and frequency response 3 45 CORRECTIVE MAINTENANCE 4 7 4 Adjust Sweep Timing 3 47 Obtaining Replacement Parts 4 5 Calibrate 1st LO System and Parts Re...

Page 4: ...nd 1 2 in 492P only 4 42 section 4 21 Changes incorporated in 2 To gain access to the IF Version 1 2 Firmware 4 42 section 4 21 TROUBLESHOOTING ON THE 3 719 MHz Oscillator Range INSTRUMENT BUS 4 42 Adjustment 4 21 Instrument Bus Data Transfers 4 42 4 829 MHz Coaxial Bandpass Filter Instrument Bus Registers 4 45 Adjustment 4 22 Troubleshooting and Calibrating the 2182 MHz Phaselocked 2nd LO 4 25 Os...

Page 5: ...et Mixer and Strobe Driver 5 76 Digital Control 5 77 Processor 5 78 Memory Board 5 87 Front Panel 5 88 Accessories Interface Board 5 94 Main Power Supply and Fan Driver 5 94 Page Section 5 THEORY OF OPERATION cont Main Power Supply 5 94 492P GENERAL PURPOSE INTERFACE B U S 5 98 Section 6 RACKMOUNT BENCHTOP VERSIONS Introduction 6 1 Electrical Characteristics 6 1 Standard Accessories 6 3 Optional A...

Page 6: ... SUMMARY Section 7 REPLACEABLE ELECTRICAL PARTS Section 8 DIAGRAMS Section 9 REPLACEABLE MECHANICAL PARTS Digital Control System Description Processor Memory Board Front Panel Accessories Interface Board Main Power Supply and Fan Driver Main Power Supply Fan Driver Board REV AUG 1981 V ...

Page 7: ...ggering requirements 3 32 3 19 Test equipment setup to check external triggering and horizontal input characteristics 3 33 vi Fig No Page 3 20 Test oscilloscope display of a sinewave input signal to EXT TRIG connector input 1 0 V peak at 2 0 V peak to peak 3 33 3 21 Display of a full screen signal at the Vertical Output Connector 3 34 3 22 Low voltage power supply adjustments and test point locati...

Page 8: ... 20 4 11 Location of the 110 MHz IF return loss adjustments and IF Gain adjustment 4 20 Fig Page N o 4 12 LO section of 829 MHz converter showing test points and connectors 4 22 4 13 Location of test jack and jumper on the 829 MHz amplifier board 4 23 4 14 Test equipment setup for aligning the 829 MHz filter 4 24 4 15 Filter tune tabs in the 829 MHz converter 4 25 4 16 Typical response when the fi...

Page 9: ...5 17 Simplified crt readout block diagram 5 48 circuit 5 97 5 18 Character on off timing 5 49 5 43 9914 GPIA block diagram 5 100 5 19 Character scan 5 50 6 1 Hardware provided for slide track 5 20 Character generator U1028 block diagram 5 51 mounting 6 3 5 21 Character scan timing 5 52 6 2 Instrument installed in a cabinet type 5 22 Dot delay circuit timing 5 53 6 4 5 23 Frequency dot marker circu...

Page 10: ...92P Sensitivity 3 25 5 9 Control Port 5 53 3 8 Sensitivity Option 01 3 26 5 10 Address Data P o rt 5 53 3 9 Adjustment Steps for Calibration 3 42 5 11 Sweep Rate Selection Codes 5 58 3 10 Power Supply Voltage Tolerances 3 43 5 12 Calibration Control Selection Codes 5 60 3 11 Resolution and Sweep Rate as a Function 5 13 Attenuation Selection Codes 5 61 of Span in Auto Mode 3 49 5 14 U4017 U3027 Out...

Page 11: ... explosive gases unless it has been specifically certified for such operation SYMBOLS In This Manual Δ This symbol indicates where applicable cau tionary or other information is to be found As Marked on Equipment DANGER High voltage TERMS In This Manual CAUTION statements identify conditions or practices that could result in damage to the equipment or other property WARNING statements identify con...

Page 12: ...492 492P Service Vol I SN B030000 up The 492 492P Spectrum Analyzer xii REV AUG 1981 ...

Page 13: ...al and Electronic Engineers 345 47th Street New York NY 10017 Product Service To assure adequate product service and maintenance for our instruments Tektronix has established Field Offices and Service Centers at strategic points throughout the United States and in countries where our products are sold Sever al types of maintenance or repair agreements are available For example for a fixed fee a ma...

Page 14: ...earlier version power supply module did not have this access plate To access P1029 proceed as follows 1 Set the instrument on its face and remove the four screws that hold the power supply module to the side rails Lift the module off the instrument 2 Remove the top and bottom screws then the side screw that holds the two sections of the power supply module together Separate the two sections to ex ...

Page 15: ...bly number R2080 on assembly A20 becomes A20R2080 Assembly and subassembly numbers are assigned in numerical order by location within the instrument Firmware Version and Error Message Readout This feature of the 492 492P provides readout of the firmware version when the power on off is cycled During initial power up cycle the firmware version flashes on screen for approximately two seconds The Rep...

Page 16: ...for incoming inspections to verify that the instrument is func tioning properly Table 1 1 ELECTRICAL CHARACTERISTICS Characteristic Performance Requirement Supplemental Information FREQUENCY RELATED Center Frequency Range Internal Mixer 50 kHz to 21 GHz Frequency response degraded by 1 dB before 100 kHz Accuracy after 2 hour warm up 5 MHz 20 of span div n or 0 2 of the center frequency 2 0 of the ...

Page 17: ...lution bandwidth is a function of the FREQUENCY SPAN DIV selection Shape Factor 60 dB 6 dB 7 5 1 or less Noise Sidebands At least 75 dBc at 30 times the resolu tion offset for fundamental mixing Pulse Stretcher Fall Time 30 Ms division 50 Video Filter Narrow Reduces video bandwidth to approximately 1 300th of the selected resolution bandwidth Wide Reduces video bandwidth to approximately 1 30th of...

Page 18: ... Display Reference Level Range 123 dBm to 40 dBm 40 dBm includes 10 dB of IF gain reduction 30 dBm or 1 W is the maximum safe input for 10 dB DIV and 2 dB DIV log modes 20 nV Div to 2 V Div 1 W maximum safe input in linear mode Steps 10 dB 1 dB and 0 25 dB for relative Δ measurements in log mode 1 2 5 sequence and 1 dB equivalent increments in LIN mode Accuracy Accuracy is a function of the RF att...

Page 19: ...acy Gain steps are monotonic same direction with the following limits Within 0 2 dB dB to a maximum of 0 5 dB 9 dB except at the decade transitions of 19 to 2 0 dBm 2 9 to 3 0 dBm 3 9 to 40 dBm 49 to 50 dBm 59 to 60 dBm and 69 to 70 dBm where an additional 0 5 dB can occur for a total of 1 0 dB per decade Maximum deviation of the 90 dB range is within 2 dB Differential Amplitude Measurement Range ...

Page 20: ... 21 0 GHz Band 5 9 5 dBm 8 5 dBm 7 5 dBm 6 5 dBm 18 0 26 GHz Band 6 a 100 dBm 9 0 dBm 8 0 dBm 7 0 dBm 26 40 0 GHz Band I f 95 dBm 85 dBm 7 5 dBm 65 dBm 40 0 60 0 GHz Band 8 a 9 5 dBm 85 dBm 7 5 dBm 65 dBm 60 0 90 0 GHz Band 9 Typically 95 dBm for 1 kHz bandwidth at 60 GHz degrading to 85 dBm at 90 GHz 90 0 150 0 GHz Band 10 Typically 85 dBm for 1 kHz bandwidth at 90 GHz degrading to 75 dBm at 140 ...

Page 21: ...dB or more RF Attenuation 30 dBm 1 W continuous 75 W peak pulse width 1 s or less with a maximum duty factor of 0 0 0 1 attenuator limit Do Not apply dc voltage to the RF INPUT External Mixer Input for IF signal and the source of negative going bias for external wave guide mixers Bias range 1 0 to 2 0 V 70 Ω source EXT IN HORIZ TRIG Dc coupled input for horizontal drive and ac coupled for trigger ...

Page 22: ...GPIB 492P In accordance with IEEE 488 standard PROBE POWER Provides operating power for active probe systems Output voltages and pin out are shown in Fig 1 1 GENERAL CHARACTERISTICS Sweep Sweep Time 20 m s D iv to 5 s Div in 1 2 5 sequence 10s Div in Auto Triggered auto manual and external Accuracy 5 Triggering 2 0 division of signal for internal and 1 0 V peak minimum for external Internal extern...

Page 23: ... to 55 C 95 5 0 relative humidity Non operating 62 C to 85 C NOTE After storage at temperatures below the operating range the microcomputer may not initialize on power up If so allow the instrument to warm up for 15 minutes and re initialize the microcomputer by turning the POWER Off for 5 seconds then back On Altitude Operating 15 000 feet Non operating 40 000 feet Humidity Non operating Five cyc...

Page 24: ...ed susceptibility CS01 30 Hz to 50 kHz power leads Full limits CS02 50 kHz to 400 kHz power leads Full limits Radiated emissions RE01 30 Hz to 30 kHz magnetic field Relaxed by 10 dB for fundamental 2nd 3rd harmonic of power line RE02 14 to 10 GHz Radiated susceptibility RS01 30 Hz to 30 kHz magnetic field Full limit RS03 up to 1 GHz Full limit Table 1 3 Physical Characteristics Characteristics Des...

Page 25: ... to the specifications are listed below Options are factory installed at the time of the initial order Contact your local Tektronix Field Office for additional information OPTION 01 This option provides calibrated preselection to the first 1st mixer for the 1 7 to 18 GHz frequency range and limiter protection below 1 8 GHz Band 1 becomes 100 kHz to 1 8 GHz using an input low pass filter the presel...

Page 26: ... Maximum Safe Input 1 watt or 30 dBm 1 dB Compression Point minimum 1 7 2 0 GHz Otherwise 2 8 dBm 18 dBm With no RF attenuation With no RF attenuation Frequency Response and Display Flatness3 Coaxial direct Input Band 1 100 kHz 1 8 GHz About mean average Referenced to 100 MHz Frequency response is measured with RF attenuation 10 dB and PEAKING optimized for each center frequency setting when appli...

Page 27: ...or bands 6 10 18 GHz 140 GHz The NARROW video filter is activated for narrow resolutions 1 kHz or less WIDE filter for wide resolution Frequency Band Equivalent Input Noise for Resolutin Bandwidths 1 kHz 10 kHz 100 kHz 1 MHz 50 kHz 7 1 GHz Bands 1 3 110 dBm 100 dBm 9 0 dBm 80 dBm 5 4 12 0 GHz Band 4 95 dBm 85 dBm 7 5 dBm 65 dBm 12 0 18 0 GHz Band 4 90 dBm 80 dBm 7 0 dBm 60 dbm 15 0 21 0 GHz Band 5...

Page 28: ...ess for bands 1 3 100 kHz or less for band 4 and 200 kHz or less for band 5 and above The following describes additions and changes to the specifications Table 1 5 OPTION 03 ELECTRICAL CHARACTERISTICS Characteristic Performance Requirement Supplemental Information Frequency Span Div Range Accuracy Band Narrow Span Wide Span Within 5 of the span div selected over the center eight divisions of a ten...

Page 29: ...Hz hour fundamental mixing B040000 and up and after a 30 minute warmup 15 kHz 10 minutes fundamental mixing 5 kHz 10 minutes typical after a 1 hour warmup 3 kHz 10 minutes fundamental mix ing 1 kHz 10 minutes typical Sensitivity 100 Hz 8 dB better than 1 kHz sensitivity OPTION 08 Deletes External Mixer capability Standard accessories do not include the Diplexer Frequency range of the instrument is...

Page 30: ... Noise 1 kHz Bandwidth Maximum Mean Average Referenced to 100 MHz 18 0 26 5 GHz WM490K 100 dBm 3 0 dB 6 dB 26 5 40 GHz WM490A 9 5 dBm 3 0 dB 6 dB 40 60 GHz WM490U 95 dBm 3 0 dB 6 dB Cable SMA to SMA male connector 012 0649 00 NOTE These characteristics assume that the waveguide mixer is connected to a cw signal source and that the PEAKING control is adjusted for maximum signal amplitude The signal...

Page 31: ...cation 492 492P Service Vol I SN B030000 up Power Cord Option Number N orth A m erican 120V 15A 161 0118 00 A1 U niversal E uro 220V 13A 1 6 1 0 1 3 2 0 0 A2 UK _ 2 40V 13A 1 61 0 1 3 3 0 0 A3 A ustralian 240V 10 A _ 16 1 0135 00 A4 N orth A m erican _ 2 40V 15A __ 1 6 1 0 1 3 4 0 0 A5 S w iss _ 2 5 0 V 6 A _ 161 01 67 00 Fig 1 3 International power cord and plug configuration for the 492 492P ...

Page 32: ...lso used to store accessories and external waveguide mixers The cover is removed by first pulling up and in on the two release latches then pulling up on the cover The accesso ries door is unlatched by pressing the latch to the side and lifting the cover The handle of the 492 492P can be positioned at several angles to serve as a tilt stand or it can be positioned at the top rear of the instrument...

Page 33: ...imensions to allow for cushioning Table 2 1 lists instrument weights and carton strength requirements 2 Install the front cover on the 492 492P and surround the equipment with polyethylene sheeting to protect the finish Table 2 1 SHIPPING CARTON TEST STRENGTH Gross Weight Carton Test Strength Pounds Kilograms Pounds Kilograms 0 1 0 0 3 73 2 0 0 74 6 10 30 3 73 11 19 275 102 5 30 120a 11 19 44 76 3...

Page 34: ...r as a sub part to a step EQUIPMENT REQUIRED Table 3 1 lists the test equipment and calibration fixtures recommended for the Performance Check and Adjustment Procedure The characteristics specified are the minimum required for the checks Substitute equipment must meet or exceed these characteristics Special calibration fixtures that are listed facilitate the procedure These are available from Tekt...

Page 35: ... Meter with Power Sensors 6 0 dBm to 20 dBm full scale 100 kHz to 18 GHz Hewlett Packard Model 435A with 8482A and Power Sensors Vector Voltmeter or Frequency to 100 MHz Hewlett Packard Model 8405A used to check CALibrator OUTput Power Meter with Lowpass Filter Measure 20 dBm within 0 1 dB The filter must have rolloff of 40 dB or more at 200 MHz Hewlett Packard Model 435A with 8481A Sensor used to...

Page 36: ...l Radio Variac Type W10MT3 Digital Multimeter 10M V to 350 Vdc TEKTRONIX DM 501A or DM 502A Dc Block Tektronix Part No 015 0221 00 Adapter Sealectro male to male Tektronix Part No 103 0098 00 Sealectro Part No 51 072 0000 Adapter bnc female to Sealectro male Tektronix Part No 103 0180 00 Three Extension Cables Sealectro female to Sealectro male 8 Tektronix Part No 175 2902 00 Adapter bnc to Sealec...

Page 37: ... dBm MIN RF ATTEN dB 0 MIN NOISE push button Off MIN DISTORTION FINE push button Coarse not illuminated Digital Storage Option 02 VIEW A On VIEW B On MAX HOLD Off SAVE A Off B SAVE A Off PEAK AVERAGE Fully cw c Allow the instrument to warm up for at least two hours before proceeding with this check VERIFICATION OF TOLERANCE VALUES Compliance tests of specified limits listed in the Perfor mance Req...

Page 38: ...division Calibration 492 492P Service Vol 1 SN B030000 up Performance Check PULSE STRETCHER Active increases the fall time of video signals to make narrow pulses on the display easier to see With FREQ SPAN DIV at MAX TIME DIV at 5 ms and Digital Storage off the markers should increase in bright ness when PULSE STRETCHER is active VIDEO FILTER Two filters independently selected to provide WIDE 1 30...

Page 39: ... The signal should shift horizontally and then return to a new location Press again and the signal should return to the same new location Return FREQ SPAN DIV to 100 MHz FREQUENCY RANGE Two push buttons that shift the 492 492P frequency bands Press the Δ button and note the up shift of bands then press the V button and note that the bands shift down to the 0 to 4 2 GHz range 0 to 1 8 GHz Option 01...

Page 40: ...quipment setup is shown in Fig 3 1 Set the front panel controls as follows then apply the comb gener ator output to the RF INPUT Band Frequency Range n 1 0 0 4 2 GHz 0 0 1 8 GHz Option 01 1 2 1 7 5 5 GHz 1 3 3 0 7 1 GHz 1 4 5 4 18 GHz 3 5 15 21 GHz 3 6 a 18 0 26 5 GHz 6 7a 26 40 GHz 1 0 8 40 60 GHz 1 0 9a 60 90 GHz 15 1 0 90 140 GHz 23 1 1 a 140 220 GHz 37 FREQUENCY RANGE FREQUENCY FREQ SPAN DIV A...

Page 41: ...in specifications over the range of the oscillator tuning Since the other bands operate on harmonics of the oscil lator fundamental accuracy or error will be the same as that measured for the fundamental bands multiplied by the har monic number n of the band If you choose to check the higher bands it may be nec essary to increase the REF LEVEL to 10 dBm to locate true response of the 500 MHz comb ...

Page 42: ...age on controller screen and S in 492P lower readout enter WBYTE 20 to clear the SRQ g The analyzer tunes 500 MHz takes a single sweep and sets up a display of the marker signal you centered and the signal acquired after the TUNE command executed Note the error between the two signals h Press RETURN to continue Change FREQ SPAN DIV to 200 MHz and FREQUENCY to 3 0 GHz Re peat parts e through g then...

Page 43: ...uency is 100 MHz 1 7 kHz b Three procedures for measuring output level are giv en vector voltmeter power meter and comparison method using an accurate 2 0 dBm source 1 Vector Voltmeter Method a Terminate the voltmeter probe with a 50 Ω feedthrough termination and then connect the terminated probe to the 492 492P CAL OUT connector Fig 3 2 b Set the vector voltmeter frequency to 100 MHz c Check for ...

Page 44: ...cal sensitivity This is done by applying the veritical signal at the rear panel VERT connector of the 492 492P to the exter nal amplifier input and selecting the vertical amplifica tion and Time Div values that provide the degree of accuracy desired Calibration 492 492P Service Vol 1 SN B030000 up Performance Check 4 Check RF Attenuator within 0 3 dB 10 dB to a maximum of 0 7 dB over the 60 dB ran...

Page 45: ...dBm Re establish a signal reference level as described above g Check the 30 dB attenuator against the external stan dard by switching the REF LEVEL to 0 dBm for 30 dB RF ATTEN then remove 30 dB of external attenuation Error must not exceed 0 7 dB Include the calibrated attenuator correction factor 5 Check IF Gain Accuracy 0 2 dB dB and 0 5 dB 10 dB to a maximum of 2 dB over the full 90 dB range 70...

Page 46: ... amplitude j Check the 30 dBm to 40 dBm gain accuracies as previously described k Repeat the procedure checking gain accuracies to 7 0 dBm d Activate MIN NOISE and note signal level shift Shift must not exceed 0 8 dB or 2 minor divisions attenuator plus gain accuracies e Re position the signal level to the graticule reference line by adjusting the output of the signal generator f Switch the REF LE...

Page 47: ...te signal amplitude decreases to 2 0 4 divisions or half amplitude i Add another 6 dB of attenuation Signal amplitude should decrease to 1 0 0 4 divisions j Return the Vertical Display to 10 dB DIV and discon nect the signal to the RF Input 7 Amplitude Variation with Change in Resolution Bandwidth 0 5 dB a Apply the calibrator signal to the RF INPUT and set the front panel controls as follows FREQ...

Page 48: ... this step to check your instrument Test equipment see Table 3 4 is the same for each procedure If your instrument is the rackmount version with semi rigid cables to the back panel Option 31 fre quency response may degrade at the higher frequency end see Rackmount Benchtop Version Section 6 for details NOTE Loss of signal through interconnecting cables be comes significant above 1GHz therefore use...

Page 49: ...span so it sweeps from 0 01 to 2 2 GHz Set the generator sweep mode for automatic internal sweep at its slowest sweep time 100 s Monitor the power output as the generator sweeps across the span to ensure that the output remains constant The frequency response deviation from the mean must not exceed 1 5 dB A typical response for the frequency range of 3 6 to 5 6 GHz is shown in Fig 3 6 NOTE If any ...

Page 50: ...equency response for the 1 7 to 2 4 GHz portion of band 2 Amplitude deviation from a mean aver age must not exceed 1 5 dB k Replace the 0 01 to 2 4 GHz sweep source with a 2 0 to 18 GHz sweep oscillator Connect the test equipment as shown in Fig 3 7 Switch the RF plug in ALC to Mtr Con nect a coaxial cable between the Recorder Output of the power meter and the RF plug in Ext ALC Input Decrease the...

Page 51: ...the generator frequency to 100 kHz and its output for about 10 dBm c Adjust the REF LEVEL so the amplitude of the 100 kHz signal is about half screen in the 2 dB DIV mode d Slowly tune the frequency of the signal generator from 100 kHz to 10 MHz monitoring the output to ensure it remains constant Note the frequency response amplitude deviation above and below the average Frequency re sponse or amp...

Page 52: ...ion and connect a coaxial cable between the Recorder Output of the power meter and the Ext ALC Input of the plug in unit Decrease the Power Level to approximately 6 dBm then adjust the Gain for stable operation output stops oscillating I Set the FREQ SPAN DIV to 200 MHz and tune the FREQUENCY to 4 0 GHz Repeat the PEAKING procedure with a 4 0 GHz marker and then sweep the upper portion of band 2 c...

Page 53: ... signal feedthrough must be down 70 dB or more from the level established in part b of this step If this condition is not met it is a good indication the YIG tuned filter should be replaced 10 Check Frequency Span Div Accuracy 5 of the selected span div Span accuracy is checked by noting the displacement of calibrated markers from their respective graticule line over the center eight divisions of ...

Page 54: ...0 MHz markers are displayed over the center eight divi sions 10 MHz markers will appear between each 50 MHz marker Check the accuracy of the 50 MHz div span and 10 GHz SPAN DIV selections cannot be checked however their Itly related to the 100 MHz and 200 MHz k Reduce the FREQ SPAN DIV to 20 MHz and apply 50 ns 20 MHz markers Check the span div accuracy FREQUENCY RANGE to band 1 JGHz Option 01 Re ...

Page 55: ...al position control to align a marker on the 1 st graticule line then check the displacement of markers from their respective positions over the center eight divisions Individual marker displacement must not exceed 5 or 2 minor divisions m Remove the time mark generator signal and reconnect the comb generator to the RF INPUT Modulate the 500 MHz comb generator with 2 ts 500 kHz markers by applying...

Page 56: ...Fig 3 10A Bandwidth must equal 1 MHz 200 kHz i Change the REF LEVEL to 3 0 dBm then reduce the RESOLUTION BANDWIDTH to 1 kHz and the FREQ SPAN DIV to 100 kHz while adjusting the FREQUENCY to optimize time markers on the display Reduce the FREQ SPAN DIV to zero j Check the accuracy of the 1 s to 5 s sweep rates by applying appropriate markers to modulate the comb gener ator signal as the TIME DIV s...

Page 57: ...lection of the trace This setting is referred to as reference frequency Adjust the generator output power to align the trace on the top graticule line e Vary the generator frequency below the reference suf ficiently to move the trace down screen 60 dB and note the generator frequency Now change the generator frequency to a setting above the reference that is sufficient to move the trace down 60 dB...

Page 58: ...ion bandwidths Compare this level with characteristics list ed in Table 3 7 or Table 3 8 NOTE On instruments without Digital Storage it may be de sirable with some RESOLUTION BANDWIDTH and REF LEVEL settings to activate the NARROW Video Filter Thisprocedure may be used to check sensitivity characteristics for optional external waveguide mixers if an accurate signal source has been used to estab li...

Page 59: ...ble ambient temperature before checking A restabilization time of 10 minutes per GHz of frequen cy change after the center frequency is retuned must be allowed for instruments that do not have phaselock Option 03 a Select a Vertical Display of 10 dB DIV REF LEVEL 2 0 dBm FREQUENCY RANGE 0 4 2 GHz 0 1 8 GHz Option 01 FREQ SPAN DIV of 10 MHz TIME DIV at AUTO and activate AUTO RESOLUTION b Connect th...

Page 60: ...d above Residual FM for Option 03 instruments must not exceed 50 Hz for a 20 ms period or two divisions c Position the marker signal with the FREQUENCY con trol so the slope horizontal versus vertical excursion of the response can be measured as illustrated in Fig 3 12A SIN GLE SWEEP may be advantageous to freeze the display if the instrument has Digital Storage d Switch FREQ SPAN DIV to zero time...

Page 61: ...om the input signal level NOTE Intermodulation products may not appear unless the input signallevelis offscreen Use the VIDEO FILTER and very slow sweep rates to help resolve these sidebands Θ Decrease signal separation and FREQ SPAN DIV settings and check again for sidebands Check IM distortion at other portions of the frequency range IM distortion should be down at least 70 dBc b Apply two signa...

Page 62: ...al level 18 Check Harmonic Distortion 60 dBc or 100 dBc for Option 01 below the level of a full screen signal in MIN DISTORTION mode a Set the front panel controls as follows FREQUENCY RANGE Band 1 FREQ SPAN DIV 5 MHz AUTO RESOLUTION On Vertical Display 10 dB DIV REF LEVEL 3 0 dBm MIN RF ATTEN 0 dB Video Filter WIDE Digital Storage Option 02 VIEW A VIEW B b Apply the output of the signal generator...

Page 63: ...play TIME DIV REF LEVEL AUTO RESOLUTION VIDEO FILTER Digital Storage Option 02 Band 1 20 MHz 10 dB DIV AUTO 2 0 dBm On WIDE VIEW A VIEW B b Apply the CAL OUT signal to the RF INPUT Center one of the markers on screen with the FREQUENCY control and adjust the REF LEVEL for a full screen display c Keep the calibrator marker centered on screen as the FREQ SPAN DIV is reduced to 10 kHz and the RESOLU ...

Page 64: ... 100 MHz signal and tune the 492 492P FREQUENCY to center the signal on screen d Decrease the output of the signal generator so the display is half screen then modulate the signal with a 1 kHz sine wave Calibration 492 492P Service Vol 1 SN B030000 up Performance Check e Decrease the FREQ SPAN DIV to 0 Adjust the FRE QUENCY control if necessary to keep the signal centered f Adjust the sine wave ge...

Page 65: ... level for 2 V peak to peak 1 0 V peak as indicated on the test oscilloscope see Fig 3 20 j Change the 492 492P TIME DIV to 2 s Activate the EXT Triggering k Check that sweep runs as the generator frequency is varied from 15 Hz to 1 MHz I Return the TRIGGERING to FREE RUN and the input signal level to 0 V 24 Check External Sweep Operation 0 to 10 V 1 V should provide a full sweep across the 10 div...

Page 66: ... sinewave input signal to EXT TRIG connector input 1 0 V peak at 2 0 V peak to V peak c Connect the output of the sine wave generator with a frequency of 1 kHz to the back panel EXT IN connector Increase the output for a full 1 0 division sweep d Check the output peak to peak voltage level of the generator Output should equal 20 V 2 V peak to peak 10 V 1 V peak NOTE A variable voltage source can b...

Page 67: ...V 0 2 V see Fig 3 21 26 Check Horizontal Signal Output 0 5 V 5 either side of center screen with a full range of 2 5 V to 2 5 V 10 a Connect a dc coupled test oscilloscope to the HORIZ OUTPUT connector Set the 492 492P TIME DIV to MNL position b Adjust the crt beam five divisions either side of center screen with the MANUAL SCAN control The output range should equal 2 5 V to 2 5 V 10 c Return the ...

Page 68: ...ks correct operation of the serial poll enable SPE and serial poll disable SPD interface messages The status byte is read and if anything other than ordinary operation is indicated the instrument fails the test GPIB rear panel switch test All five primary address switches are checked for correct operation Three subroutines are called in the process of testing one address switch The first two send ...

Page 69: ...00 REM 49XP GPIB VERIFICATION PROGRAM 5030 INIT 5040 ON SRQ THEN 19280 5050 DIM V 400 W 400 5060 1 7 0 5070 PAGE 5080 PRINT JJJENTER 49XP S PRIMARY ADDRESS DEFAULT 1 5090 INPUT T 5100 IF T THEN 5130 5110 A 1 1 5120 GO TO 5180 5130 A1 VAL T 5140 IF A1 0 AND A K 3 1 THEN 5180 5150 PRINT JJGERRORH A 1 IS NOT A VALID ADDRESS 5160 PRINT ONLY 0 THRU 30 ARE VALID ADDRESSESKK 5170 GO TO 5080 5180 PAGE 519...

Page 70: ...060 PRINT A1 TIM 8070 INPUT A1 T6 8080 IF R O T 6 THEN 8100 8090 GO TO 9000 8100 PRINT J GO TO LOCAL GTL FAIL G 8110 GO TO 19530 8120 REM 8130 REM 8140 REM 8150 REM 8160 REM 9000 REM GROUP EXECUTE TRIGGER GET 9010 PRINT GROUP EXECUTE TRIGGER GET 9020 ON SRQ THEN 9120 9030 1 7 0 9040 PRINT A1 INIT TIM 100M SIG EOS ON 9050 WBYTE 32 A 1 8 9060 T6 3 9070 GOSUB 19390 9080 PRINT A1 EOS OFF 9090 IF 1 7 0...

Page 71: ...2030 T6 1 12040 GOSUB 19390 12050 INPUT A1 V 12060 T SEG V 16 1 12070 IF T L THEN 12100 12080 PRINT J 49XP ADDRESSED AS LISTENER FAIL G 12090 GO TO 19530 12100 PRINT 49XP ADDRESSED AS TALKER 12110 PRINT A1 INI TIM 50M SIG SIG WAI LORDO 12120 INPUT A1 V 12130 T SEG V 16 1 12140 IF T T THEN 13000 12150 PRINT 49XP ADDRESSED AS TALKER FAIL 12160 GO TO 19530 12170 REM 121 8 0 REM 12190 REM 12200 REM 12...

Page 72: ...H 15010 PAGE 15020 A1 1 15030 GOSUB 19000 15040 PRINT 0 1 0 1 1 1 0 0 0 0 1 15050 GOSUB 19070 15060 PRINT JJTESTING LF OR EOI SWITCH 15070 GOSUB 19190 15080 WBYTE 32 A1 73 68 63 10 15090 INPUT A1 T 15100 T SEG T 1 9 15110 IF T ID TEK 49 THEN 15140 15120 PRINT J LF OR EOI SWITCH FAIL G 15130 GO TO 19530 15140 T6 2 15150 GOSUB 19390 15160 REM 15170 REM 15180 REM 15190 REM 15200 REM 16000 REM TALK ON...

Page 73: ...090 INPUT P 18100 INIT 18110 PRINT JIF AN L IS STILL PRESENT THE IFC LINE IS FAULTY 18120 PRINT IF THE L VANISHED IFC TESTED OK 18130 PRINT JJCHECK ALSO THE 49XP FRONT PANEL FOR PROPER LOCAL CONTROL 18140 PRI IF THE FRONT PANEL IS LOCKED OUT THE REN LINE IS FAULTY IF 18150 PRINT NOT REN TESTED OK 18160 PRINT JJJGPIB VERIFICATION COMPLETEG 18170 END 18180 REM 18190 REM 18200 REM 19000 REM REAR PANE...

Page 74: ...ESS RETURN C R TO CONTINUE 19360 INPUT T 19370 RETURN 19380 REM 1 19390 REM DELAY GENERATOR 19410 REM T6 GIVEN IN SEC GLOBAL 19 SCRATCH 19420 IF T6 0 THEN 19510 19430 IF RND 0 0 5 THEN 19490 1 19440 REM 4051 19450 T6 T6 220 19460 FOR 19 1 TO T6 19470 NEXT 19 1 19480 GO TO 19510 19490 REM 4052 19500 CALL WAIT T6 19510 T6 0 I 19520 RETURN 19530 REM FAILURE DECISION HANDLER 19540 PRINT JJISELECT A UD...

Page 75: ...ting and a grounding wrist strap The work plane should be connected to earth ground 2 All test equipment accessories and soldering tools should be connected to earth ground 3 Minimize handling by keeping the components in theiroriginalcontainers untilready for use Minimize the removal and installation of semiconductors from their circuit boards 4 Hold the IC devices by their body rather than the t...

Page 76: ... Part 1 Adjusting the Pow er Supply O scillator F requency a Remove the Power Supply module as described in the Maintenance section Remove the Power Supply module cover and disconnect P3045 Calibration 492 492P Service Vol 1 SN B030000 up A djustm ent P rocedure b Apply power to the module by plugging the power cord into the power input plug and connect it to a suitable power source 115 V ac or 23...

Page 77: ...ER off and preset the INTENSITY control fully counterclockwise MANUAL SCAN to midrange and TIME DIV to MNL Set the Intensity Limit R1027 on the Z Axis board Fig 3 23 fully counterclockwise and Crt Bias R2040 on the High Voltage board Fig 3 24 fully clockwise b Switch POWER on and after the power up state has stabilized change the Vertical Display mode to 2 dB DIV deactivate READOUT and if the inst...

Page 78: ... Defocus the dot with the focus adjustment then adjust Astigmatism Ft1058 Fig 3 23 for a round dot Re focus the crt beam dot 7 Turn the INTENSITY control counterclockwise until the dot just disappears and again measure the collector voltage of Q4058 or Q4059 Voltage should equal or ex ceed the voltage measured in part 4 If the voltage is less repeat the procedure for setting Crt Bias Calibration 4...

Page 79: ...Fig 3 23 so the trace is aligned with the graticule lines g Change the REF LEVEL so the trace is approximately 15 to 20 dB below the top of the screen Now while alter nately switching between 2 dB DIV and 10 dB DIV adjust Geometry R1051 Fig 3 23 for the straightest trace at the top and bottom of the screen 3 46 If the instrument has Digital Storage turn the storage on and use the PEAK AVERAGE curs...

Page 80: ...eam to the right graticule edge 1 0 th graticule line g Adjust MANUAL SCAN so crt beam moves to the left edge of the graticule and check that the voltage at TP1061 is now approximately 5 0 V h Turn the POWER off and disconnect the DVM Re move and install the Deflection Amplifier board on an extender i Change the test oscilloscope to Ext Trigger Apply the Readout Off signal at TP1011 Fig 3 26 in th...

Page 81: ...y clockwise q Adjust C5021 and C4057 for best REF LEVEL readout straightest letters and numerals 4 Adjust Sweep Timing a Test equipment setup is shown in Fig 3 28 Select EXT Triggering TIME DIV of 10 ms and a FREQ SPAN DIV of 10 MHz or less b Apply 10 ms time marks from the time mark gener ator to the EXT Video In pins 2 and 1 of the ACCESSO RIES jack see Fig 3 28 and the Trigger Output of the tim...

Page 82: ...RUN and remove the time mark generator markers to the 492 492P Reposition the trace if moved in part c Table 3 11 cont FREQ SPAN DIV RESOLUTION TIME DIV FREQ SPAN DIV RESOLUTION TIME DIV MAX 1 MHz 50 ms 200 kHz 10 kHz 50 ms 200 MHz 1 MHz 2 0 ms 100 kHz 10 kHz 2 0 ms 100 MHz 1 MHz 1 0 ms 50 kHz 10 kHz 1 0 ms 50 MHz 1 MHz 1 0 ms 20 kHz 10 kHz 1 0 ms 20 MHz 1 MHz 1 0 ms 10 kHz 1 kHz 50 ms 10 MHz 1 MH...

Page 83: ... DIV MNL Triggering FREE RUN MANUAL SCAN Midrange 2 Connect the digital voltmeter DVM set to the 20 V range between TP1058 of the 1st LO Driver and chassis ground Fig 3 31 so the voltage at the test point can be monitored Adjust FREQUENCY for a readout of 0 MHz as the FREQ SPAN DIV is reduced to 5 MHz Note the DVM reading 3 Tune the FREQUENCY for a readout of 4 278 GHz switch FREQ SPAN DIV to 200 ...

Page 84: ... marker of the Calibrator signal to the center of the screen then reduce the FREQ SPAN DIV to 2 MHz activate DEGAUSS and set the FREQUENCY readout to 1 800 GHz 4 Adjust the 1st LO Offset R1032 Fig 3 31 on the 1st LO Driver board to center the 1 8 GHz marker 5 Tune the FREQUENCY for a readout of 100 MHz switch the SPAN DIV to a higher setting to facilitate tuning then back to 2 MHz Degauss by press...

Page 85: ... is 1 8 GHz the large at 1 00 MHz Proceed with the following adjustments a Adjust the 1st LO Offset R1032 on the 1st LO Driver board to bring the two signals to the same horizontal position If one or no signals appear on screen adjust R1031 until a signal comes on screen Then adjust R1032 1st LO Offset until the second signal appears while alternately ad justing the 1st LO Sense R1031 to keep the ...

Page 86: ...tted slugs These are Varactor diode mounts b Tighten the lock nut and recheck the oscillator fre quency If correct disconnect the counter and pro ceed with part b b Adjust tuning range of the 2nd LO as follows 1 On the Center Frequency Control circuit board center the Fine Tune Range R4040 and the Fine Tune Sen sitivity R3040 adjustments see Fig 3 33 2 Set the FREQUENCY TO 5 MHz FREQ SPAN DIV to 1...

Page 87: ...IV to 500 kHz 2 Tune the FREQUENCY to 5 MHz then center one of the 1 μβ markers on screen 3 Activate the IDENTIFY 500 kHz ONLY mode 4 Adjust Coarse Tune Sensitivity R1028 Fig 3 33 on the Center Frequency Control board so that on alter nate sweeps the signals align horizontally with each other Time Mark Generator 0 I 492 Spectrum Analyzer 10 ns marker 2nd LO RF Input Counter O Q A Test equipment se...

Page 88: ... the instruction again if necessary to complete the adjustment Press USER DEFINABLE KEY 4 to start the sequence and press BREAK to stop the sequence b Adjust the Coarse Tune Sensitivity R1028 until the harmonics of alternate sweep are at the same horizontal position in the display as the regular sweep It is not impor tant where they are in the display just so they are at the same horizontal locati...

Page 89: ...Fine Tune Sensitivity R3040 until the harmonics displayed in alternate sweep have the same horizontal location as the even sweep Note This may take some time because of the long sweep time and drift PROGRAM TO FACILITATE CALIBRATING THE 1st LO DRIVER AND THE CENTER FREQUENCY CONTROL BOARDS OF THE 492P USING TEKTRONIX 4050 SERIES COMPUTER TERMINAL 1 ON SRQ THEN 700 2 GO TO 700 4 ON SRQ THEN 100 5 G...

Page 90: ... 720 PRINT ENTER THE 492P S GPIB PRIMARY ADDRESS 730 INPUT A9 740 POLL Z8 Z9 A9 750 RETURN Calibration 492 492P Service Vol 1 SN B030000 up Adjustment Procedure 7 Adjust 1st Converter Bias NOTE This adjustmentshould only be necessary if frequency response problems are encountered a Switch the FREQUENCY RANGE control to the 3 0 7 1 GHz band Adjust Bias 1 R1043 on the 1st LO Driver Fig 3 34 for 0 25...

Page 91: ...osition and connect a coaxial cable between Recorder Out put of the power meter and the Ext ALC Input of the 2 1 5 GHz plug in unit on the sweeper Set the Power Lev el to approximately 1 0 dBm then adjust the Gain on the unit for stable operation output stops oscillating b Switch POWER off pull the Video Processor board and install it on an extender board c On the Video Processor board pull the Le...

Page 92: ... the baseline Activate NARROW Video Filter and ad just the REF LEVEL so the baseline moves to the top of the screen I Switch the Vertical Display mode to 2 dB DIV Activate VIEW A and adjust the REF LEVEL so SAVE A display and the baseline are at center screen Calibration 492 492P Service Vol 1 SN B030000 up Adjustment Procedure m Unplug P2060 Fig 3 36 and move it from Normal to Invert mode one pin...

Page 93: ...e is as follows 1 with the front panel controls set as directed in part d activate NARROW Video Filter and change TIME DIV to 50 ms Alternately turn the 19 level adjustments clockwise and counterclockwise so every other potenti ometer is fully clockwise and the adjacent potentiometer is fully counterclockwise Display should now appear as a periodic triangular waveform 2 adjust the REF LEVEL so the...

Page 94: ...ment as previously de scribed parts a through q 9 Log Amplifier Calibration C A U T I O N Use only an insulated screwdriver or tuning tool such as Tektronix Part No 003 0675 00 to make these adjustments Calibration 492 492P Service Vol 1 SN B030000 up Adjustment Procedure a Test equipment setup is shown in Fig 3 39 Set the front panel controls as follows REF LEVEL MIN RF ATTEN FREQ SPAN DIV FREQUE...

Page 95: ...sions of display change If the 10 dB step is short trace falls short of the correct line adjust gain with R4020 slightly in the same direction then switch out the 10 dB of attenu ation and adjust R1071 for a full screen display Repeat this check until the 10 dB step is within 0 2 dB Switch to 10 dB DIV display mode and recheck 10 dB logging e Increase the step attenuators in 10 dB steps Adjust Log...

Page 96: ...ection n If the 10 dB log step in the 2 dB DIV mode is long adjust gain with R4020 for less gain and rebalance R4071 o Set the step attenuators for 10 dB of attenuation then adjust the signal output level for a full screen display 10 dBm in the 2 dB DIV mode a Equipment setup is shown in Fig 3 41 1 place the VR module on an extender and connect the output 10 MHz signal from the 3rd Converter to th...

Page 97: ...ion c Increase the FREQ SPAN DIV to 50 kHz and the RESOLUTION BANDWIDTH to 100 kHz d Adjust C2050 and C5055 Fig 3 42 for the best 100 kHz filter shape and waveform centering 100 kHz 3 dB down and centered with respect to the 10 kHz refer ence Refer to Fig 3 43 1 MHz R1065 Output 0 dBm to J621 Log Ampl Input from J684 VR 1 J683 100 kHz C2Q50 10 kHz R3035 R3025 1 kHz 100 kHz C5055 J682 I fee C1022 C...

Page 98: ...d coaxial cable Connect the output of VR 1 P683 through another Sealectro male to male adapter and co axial cable to the input of the Log Amplifier at J621 Fig 3 40 j Change the FREQ SPAN DIV to 500 kHz and RESO LUTION BANDWIDTH to 100 kHz Readjust the REFER ENCE LEVEL for a seven division signal in the 2 dB DIV display mode k Switch the FREQ SPAN DIV to 10 kHz and the RES OLUTION BANDWIDTH to 10 ...

Page 99: ...ted before adjusting any VR gain settings Log Amplifier calibration can be verified by applying a OdBm 10 MHz signal to the input J621 of the Log Amplifier and checking for full screen display with a 20 dBm REF LEVEL The Post VR Gain R2038 Fig 3 42 is normally pre set by removing the VR 2 module cover and applying a 21 dBm 10 MHz signal to pin JJ Adjust for a full screen display with a REF LEVEL o...

Page 100: ...generator output to 45 dBm and change the REF LEVEL to 40 dBm i Adjust the 10 dB Gain R3035 Fig 3 44 of VR 1 so the signal amplitude is 7 divisions j Change the generator output to 55 dBm and the REF LEVEL to 5 0 dBm k Adjust the 20 dB Gain R2023 Fig 3 44 for a 7 divi sion signal amplitude I Change the generator output to 7 5 dBm and the REF LEVEL to 7 0 dBm m Adjust the 10 dB Gain R2060 Fig 3 44 ...

Page 101: ...tput If the Cal Level adjustment R1045 should run out of range change the value of select resistor A34A1R1018 12 Calibrator Output Level The calibrator output level is calibrated to a known refer ence The procedure for checking the level is described in 13 IF Gain Calibration a Set the RESOLUTION BANDWIDTH to 100 kHz REF LEVEL to 2 0 dBm and apply a 21 5 dBm 110 MHz signal through step attenuators...

Page 102: ...s a two part procedure the first can be used to calibrate the 492 492P the second is a program to be used with TEKTRONIX 4050 Series Computer termi nal with the programmable 492P only a Apply the CAL OUT signal to the RF INPUT and set the front panel controls as follows Calibration 492 492P Service Vol 1 SN B030000 up Adjustment Procedure FREQUENCY 200 MHz FREQ SPAN DIV 20 MHz REF LEVEL 1 0 dBm Ve...

Page 103: ...high level adjustments to compensate for interaction b Connect CAL OUT to the RF INPUT c Connect the 492P and 4050 Series Controller with a GPIB cable both should already be turned on Set the 492P GPIB ADDRESS switches on the rear panel for ad dress 1 switch 1 up all others down d Enter and run the following program 100 DIM C 1000 110 K 125 120 1 1 0 130 FOR 1 1 TO 10 140 FOR J 1 TO 100 150 C II J...

Page 104: ...ion 492 492P Service Vol 1 SN B030000 up Adjustment Procedure l I I I I J I I Β ί α REV SEP 1983 Fig 3 47A Digital Storage adjustment locations SN B043115 above Fig 3 47 Digital Storage adjustment locations SN B043114 below 3 71 ...

Page 105: ...re peat parts h through k as necessary m Cancel the NARROW Video Filter n Increase FREQ SPAN DIV to 10 MHz and tune the signal to within one division of the right edge of the graticule o While pressing VIEW B repeatedly adjust Input Gain R1048 SN B043115 and above R1045 SN B043114 and below on the Horizontal Digital Storage board so the hori zontal position of the stored signal matches that of the...

Page 106: ...at the RF INPUT e Tune the signal to center screen and reduce the FREQ SPAN DIV to either 1 MHz or 500 kHz f Adjust band 2 Gain R3034 Fig 3 49 for a full screen 20 dBm display g Increase the FREQ SPAN DJV to about 200 MHz and change the FREQUENCY RANGE to band 3 3 0 7 1 GHz Apply a calibrated 2 0 dBm signal at the frequency noted for the mean level in part b h Tune the signal to center screen and ...

Page 107: ...trol for 0 V indication If index on the knob is not aligned with the mark on the front panel loosen knob and position the mark so it is aligned d Apply the CAL OUT signal to the RF INPUT Set the REF LEVEL to 3 0 dBm FREQ SPAN DIV to 20 MHz and activate AUTO RESOLUTION Select the 1 7 5 5 GHz FREQUENCY RANGE and adjust the FREQUENCY to cen ter the 2 1 GHz marker Center Input Offset adjustment R1031 ...

Page 108: ...M AM 0 0 o o Digital Comb Generator Voltmeter Source Preselector Driver Board on Extenders 492 Spectrum Analyzer ill D o O O o o RF Input Comb Generator Module Fig 3 51 Test equipment setup for calibrating Preselector Driver Fig 3 52 Preselector Driver adjustments and test points R EVSEP1983 3 75 ...

Page 109: ...til the signal amplitude peaks on both bands occur at the same position of the PEAKING control 8 Set PEAKING control so the index mark aligns with the front panel mark Change FREQUENCY RANGE to 1 7 5 5 GHz adjust FREQUENCY to center the 3 5 GHz comb marker then press DEGAUSS 3 76 t Adjust 829 MHz IF Offset R1049 Fig 3 52 to peak the 3 5 GHz response u Change FREQUENCY RANGE to 3 0 7 1 GHz and cent...

Page 110: ...nder boards and into the instrument Use extend er cables and adapters to reconnect signal cables to their respective connector cable with yellow band to J501 cable with black band to J502 and cable between J500 and J511 on Phaselock Control board Calibration 492 492P Service Vol 1 SN B030000 up Adjustment Procedure b Switch the 492 492P POWER on set the TIME DIV to MNL FREQ SPAN DIV to 50 kHz and ...

Page 111: ...ce Vol 1 SN B030000 up Adjustment Procedure A Synthesizer Offset Mixer and Controlled Oscillator B Strobe Driver and Error Amplifier 3783 13 Fig 3 54 Adjustments and test point locations in the Phaselock module 3 78 REV SEP 1983 ...

Page 112: ... is still low connect a fre quency counter probe to TP2015 Frequency must range from 5 0067 to 5 0188 MHz Frequency is a function of the Controlled Oscillator assembly and counter U1022 f Error Amplifier Adjustment This part of the proce dure sets loop gain and error count break point This part is required when either the Phaselock assembly 1st LO Phase Detector or Error Amplifier is replaced Cali...

Page 113: ...the other side of center with the MANUAL SCAN control and note that the square wave response again starts to break up 400 kHz from center As the beam crosses center the display on the test oscilloscope should go through a null If a null is not found readjust center frequency Adjust R1061 if necessary so break points are 400 kHz either side of the null at center screen 13 Reconnect P2035 between pi...

Page 114: ...ody by wearing a grounded wrist strap while handling these components Ser vicing static sensitive assemblies or components should be performed only at a static free work station by qualified ser vice personnel 4 nothing capable of generating or holding a static charge should be allowed on the work station surface 5 keep the component leads shorted together whenever possible 6 pick up components by...

Page 115: ... paths between conductors or components in a humid environment Exterior Clean the dust from the outside of the instru ment by wiping or brushing the surface with a soft cloth or small brush The brush will remove dust from around the front panel selector buttons Hardened dirt may be removed with a cloth dampened in water that contains a mild deter gent Abrasive cleaners should not be used Interior ...

Page 116: ... diagrams on foldout pages in the Diagrams section contain any significant waveform voltage and logic data information Any necessary informa tion as to how the data was acquired such as operational state of the instrument is provided on the diagram or adja cent to it Refer to the Replaceable Electrical Parts list sec tionfor a description of all assemblies and components NOTE Corrections and modif...

Page 117: ...certain that any voltage or current supplied by the testequipmentdoes not exceed the limits of the com ponents to be tested a Try to isolate the problem to a component through signalanalysis Determine that circuit voltages will not dam agethe replacement b Turnthe power off before removing a component DIPPED TANTALUM CAPACITOR MARKING A A N D B CASE CAPACITANCE A ND VOLTAGE COLOR CODE Rated Voltag...

Page 118: ...al Diode Assembly instructions under Replacing Assemblies Troubleshooting and Checking the Power Supply WARNING The 492 492P uses a high efficiency power supply The potential of the primary ground for this supply is different than chassis or earth ground An isolation transformer with a turns ratio of 1 1 and a 500 VA minimum rating should be used between the power source and the 492 492P power inp...

Page 119: ...n destroy many components 3 Make an educated guess as to the nature of the prob lem such as component failure or calibration and the func tional area most likely at fault 4 Visually inspect the area or assembly for such defects as broken or loose connections improperly seated compo nents overheated or burned components chafed insulation etc Repair or replace all obvious defects In the case of over...

Page 120: ...rovide replacement or repair service on major assemblies as well as the unit Return the instrument or assembly to your local Field Office for this service Soldering Techniques Disconnect the instrument from its power source be fore replacing or soldering components Some of the circuit boards in this instrument are multilayer therefore extreme caution must be used when a soldered component is remov...

Page 121: ...rystals come with rubber tie down straps Plug the matched crystals into the two boards insert the rubber tie down into the two holes provided on either side of the crystal on the board and pull through until the crystal is held in place by the tension of the rubber tie down Replacing EPROM s or ROM s Firmware for the microcomputer is contained in ROM s on the Memory and GPIB boards Refer to the Re...

Page 122: ...Maintenance 492 492P Service Vol 1 SN B030000 up VR Mounting Plate A Location and position of mounting plate Fig 4 5 Preparing the VR module for service showing how it is supported when on an extender ...

Page 123: ... precedes this section Do not expose the diode assembly to any RF field The diode sub assembly is secured in place with four 0 80 screws An 8 32 threaded hole is provided to facilitate 4 Insertionand removal of the sub assembly There are three contact points located on the substrate side of the sub as sembly Use care when mounting and orienting these con tacts with the mating contacts in the mixer...

Page 124: ...CONVERTER A12 SWITCHED ATTENUATOR AT10 100 MHz OSC 3rd CONVERTER A34 POWER DIVIDER A 13 110 MHz IF AMPLIFIER A32 FILTER SELECT S11 FILTER SELECT S10 PRESELECTOR FL12 PHASEGATE DETECTOR 24 DIPLEXER A 14 DIRECTIONAL FILTER FL16 ATTENUATOR 3 dB AT 12 S f B Η Fig 4 6 RF deck of the B040000 and up version showing the major assemblies REV AUG 1981 4 11 ...

Page 125: ...OSC 3rd CONVERTER A34 2072 MHz CONVERTER A 18 BIAS RETURN A11 1st CONVERTER A 12 SWITCHED ATTENUATOR AT 10 ATTENUATOR 3 dB AT 12 2 7 2 7 6 9 A Fig 4 6A View of the 492 492P RF deck for B039999 and below versions showing major assemblies and circuit boards 4 12 REV AUG 1981 ...

Page 126: ...GITAL STORAGE VERTICAL A61 SWEEP A72 I HORIZONTAL A60 PROCESSOR A58 GPIB A56 MEMORY A54 PHASE LOCK CONTROL A51 PHASE LOCK SYNTHESIZER A50 H SPAN ATTENUATOR A48 CENTER FREQUENCY CONTROL A46 1ST LO DRIVER A44 PRESELECTOR DRIVER A42 VIDEO PROCESSOR A40 Z AXIS RF INTERFACE A70 Fig 4 7 View of the 492 492P top deck showing major assemblies REV AUG 1981 ...

Page 127: ...y If the coil is damaged beyond repair the crt with the coil must be replaced If the finish red lead is broken remove the tape and unwind one or two turns so it can be respliced and soldered to the lead wire Rewind and retape If the start black lead is broken and the lead is too short to resplice attempt to fish out the broken end so one or two turns can be unwound Resplice and solder to the lead ...

Page 128: ... was under the FREQUENCY tuning knob which holds the panel to the front panel casting 3 Loosen the black screws through the crt bezel so the panel can be moved enough to lift it off the casting 4 Unplug and replace the desired switches Main Power Supply Module To avoid damage to the Mother board connector J5041 and Interface connector J 1034 during removal or installation of the Power Supply Modul...

Page 129: ...the 1st YIG Local Oscillator Interface Board The YIG oscillator assembly includes an interface circuit board that can be ordered separately To replace the board refer to Fig 4 8 and the following procedure Use a desoldering tool to remove the solder as these leads are unsoldered 1 Unsolder and lift one end of C1014 820 mF capacitor at the top of the board 2 Unsolder and lift one end of VR1010 3 Un...

Page 130: ...nnected and the cover removed 3 Unsolder the leads to the fan Maintenance 492 492P Service Vol 1 SN B030000 up 4 Using a 1 4 inch open end wrench or needle nose pli ers retain the nylon nut while unscrewing the fan mounting screws with a Phillips screwdriver NOTE After the fan is removed be sure to retain the rubber and steel washers on the screws These are essential for proper operation of the co...

Page 131: ... SN B030000 up FAN PLATE POWER SUPPLY HOUSING FAN SPACER 4 40 x 0 312 M ACHINE SCREW B SN B030000 to B042719 4 40 N UT WASHER EYELET FLAT WASHER 5 8 4 40 M A C H IN E SCREW SLOT A SN B042720 and UP Fig 4 9 Fan Assembly 4 18 REV JUN 1983 ...

Page 132: ...0 MHz SPAN DIV to 5 MHz RESOLUTION BAND WIDTH to 3 MHz VERTICAL DISPLAY to 10 dB DIV and REFERENCE LEVEL to 2 0 dBm 3 Adjust the step attenuator for full screen 2 0 dBm display 4 Connect the 110 MHz IF input to the VSWR bridge and connect a 50 Ωtermination to the output of the IF ampli fier Now plug the power cable P3045 into the and 15 V source and ground the case of the assembly 5 Adjust C2047 a...

Page 133: ...e Bias adjustments remove the as sembly from its mounting then remove the mounting plate on the bottom of the assembly Reconnect the Mixer to the input output lines using the same cables cable length of semi rigid cables is critical Apply the CAL OUT signal to the RF INPUT and tune a marker to center screen Simulta neously adjust both bias potentiometers for maximum signal amplitude 110 MHz THREE ...

Page 134: ...ation pin 1 to pin 1 e Refer to step 4 for adjustment procedure 3 719 MHz Oscillator Range Adjustment a Adjustment requires the following test equipment A frequency counter with a frequency range to 1 GHz nine digit readout sensitivity of 20 mV rms prescale 15 mV rms direct such as TEKTRONIX DC 508A a digital voltmeter with a 3 5 digit readout such as TEKTRONIX DM 502A test leads for the DVM a 50 ...

Page 135: ...rter cover press down to ensure good shielding and note the frequency readout of the counter Frequency should fall within 723 600 and 724 400 MHz h Reconnect P234 100 MHz and P237 2182 MHz and confirm that phaselock is operating by noting that the voltage on TP1011 is between 6 75 and 7 5 V This com pletes the adjustment of the 719 MHz LO Replace the cov er and reinstall the 829 MHz converter asse...

Page 136: ...king generator see Fig 4 14 d Connect the spectrum analyzer tracking generator system through the return loss bridge to the Peltola jack J1029 on the 829 MHz amplifier board see Fig 4 14 Reconnect P235 100 MHz reference signal and P237 2182 MHz input to the LO section of the converter b Unsolder and reconnect the jumper on the 829 MHz Amplifier board to the test Peltola jack J1029 see Fig 4 13 Ter...

Page 137: ...z see Fig 4 16A f Adjust the 1 4 wavelength lines in the filter in se quence starting with the resonator at the 829 1MHz input see Fig 4 15 Adjustment is made by shorting the adjacent resonator to ground with a low inductance conductor such as a broad blade screwdriver then bend the loop or tab of the respective stub with a non metallic tuning tool to change the series capacitance of the resonator...

Page 138: ...lace the 829 MHz Converter cover and reinstall the assembly in the 492 492P Troubleshooting and Calibrating the 2182 MHz Phaselocked 2nd LO The assembly contains a microstrip phaselocked 2182 MHz oscillator and its phaselocking circuits The 14 22 MHz Phaselock board is contained in the mu metal hous ing the 2182 MHz Oscillator 2200 MHz Reference and 2200 MHz Reference Mixer are contained in the ma...

Page 139: ...d at the factory and repair can be accomplished by replacing the 2 7 2 7 1 6 0 Fig 4 17 Typical response when the third and fourth reson a tors are tuned correctly board we recommend sending the instrument or assembly to your Tektronix Service Center for repair The 2182 MHz Phaselocked 2nd LO should only require calibration when a component within the assembly has been replaced This procedure is i...

Page 140: ...move the 2nd LO assembly mounting screws and carefully remove the 2nd LO assembly so the power input connections remain intact Turn the assembly over sothe machined aluminum housing is up and place the assembly on a flat surface Use a 5 64 Allen wrench to re move the screws holding the lid on the machined aluminum housing Place the screws in a safe place then remove the lidfor the aluminum housing...

Page 141: ...ectrum Analyzer 3 7 8 3 3 5 3 8 1 3 1 Fig 4 18 Test equipment setup for calibrating the oscillator section of the 2182 MHz Phaselocked 2nd Lo bring the oscillator within tolerance Bend the tab up to 3 Measure Output Power increase frequency and down to lower frequency If unable to bring the oscillator frequency within range replace the 2182 MHz microstrip oscillator board NOTE Before making power ...

Page 142: ... 2182 MHz tune line from 0 to 12 5 V and note the fre quency change at C2204 output of the 2200 MHz Refer ence Mixer b Frequency change or tune range should equal 20 to 35 MHz for a voltage change of 0 to 12 5 V on the tune line 6 Reassembly a Disconnect and remove the connections from the vari able power supply and the test spectrum analyzer b Confirm that the output signal frequency is 18 MHz 1 ...

Page 143: ...pped Troubleshooting and Calibrating the 14 22 MHz Phaselock Section of the 2nd LO Assembly This side of the assembly contains the 14 22 MHz Phaselock circuit board Replacing oscillator components in this section may alter sweep linearity and frequency of the 14 22 MHz oscillator The following checks and calibration should aid in repairing and returning the assembly to satis factory operation Tabl...

Page 144: ...l 0 V 0 05 V with the FREQ SPAN DIV 100 kHz b Turn the POWER off Remove the lid for the mu metal housing assembly to gain access to internal circuitry NOTE This check should only be used to verify linearity of previously calibrated assemblies If varactor CR1075 has been replaced go to Step 4 Coarse Linearity Adjustment a Set the front panel controls as follows CENTER FREQUENCY 10 MHz FREQ SPAN DIV...

Page 145: ...isions continue with part 4 Coarse Linearity Adjustment 4 Coarse Linearity Adjustment The shaping circuit has a wide range of adjustment to compensate for variations in the tuning varactor character istics This range of adjustability however makes the circuit calibration tedious This coarse adjustment procedure presets the component values to make it easier to perform the fine adjustments e Turn t...

Page 146: ...is greater on the right than the left side Adjusting R1070 will change the 2nd LO center frequen cy causing the center marker to shift position Increase the FREQ SPAN DIV to 100 kHz recenter the marker then return the SPAN DIV to 50 kHz 2 Decrease R1068 if the spacing between markers at the center of the display is closer than the markers at the right or left edge Increase the value if the spacing...

Page 147: ...68 approximately 10 then rerun the plot and interpolate the resistance value until you have minimized curvature This adjustment may affect the slope because of interaction therefore it may be necessary to repeat the adjustment of R1070 When R1068 and R1070 are properly adjusted the tuning plot should ap proach a straight line with zero slope Peak to peak vari ation across the plot should not excee...

Page 148: ...e on the 2182 MHz tune line at feedthrough capacitor C2203 Nominally this voltage is ap proximately 5 V when phaselocked Use a FREQ SPAN DIV of 100 kHz or greater before making the mea surement If there is no difference frequency signal the volt age at C2203 will be approximately 0 V A voltage of approximately 13 V at C2203 may indicate loss of signal from the 14 22 MHz oscillator Maintenance 492 ...

Page 149: ... because of a breakdown in communication Some notes on operation of several versions of instru ment firmware conclude the discussion of microcomputer system maintenance Memory Board Option Switch S1033 on the Memory board informs the microcomputer whether to configure itself at power up for several test modes for instrument modifications and for Option 08 Fig ure 4 24 shows the correct setting of ...

Page 150: ...ar manner for low RAM U1046 and U1037 or 9 10 or 11 times for high RAM U1042 and U1032 The microcomputer continues to repeat the number of pulses after an error is found Step 3 The microcomputer proceeds to checksum all the ROMs A checksum is stored in the header of each ROM This is compared to a checksum formed by the successive 8 bit sum of each byte in the ROM starting at the fourth location in...

Page 151: ...dress space it toggles the address lines The MSB A15 has a period of about 1540 ms the period of A14 through A0 is divided by two from the line above down to the LSB A0 with a period of about 4 7 με The four high orderlines A15 through A12 are shown in Fig 4 25 Ignore the narrow pulses that may be evident during the low por tionof each cycle The data lines on the microprocessor side of U1013 on th...

Page 152: ...y fashion during the time they appear to be low in the figure Fig 4 27 Enable and YO through Y2 of address decoder U1037B The pattern on the instrument bus toggles DATA VALID and POLL and exercises the address and data lines at sepa rate times The address lines change when DATA VALID is low and the data lines change when DATA VALID is high There may be an exception on DB4 through DBO these lines m...

Page 153: ...se lected This is evident when the UNCAL indicator lights Change the RESOLUTION BANDWIDTH or increase TIME DIV if not set to AUTO for a calibrated display 3 The REFERENCE LEVEL may hang up above 30 dBm in the ΔΑ mode For example with a REFER ENCE LEVEL of 30 dBm in MIN DISTORTION mode se lect ΔΑ mode and increase the REF LEVEL for a readout of 1 00 dBm then switch out of ΔΑ mode by cancelling FINE...

Page 154: ...Fig 4 31 Instrument bus check Exceptions for Version 1 1 in the 492P only 1 The sense of the parallel poll is reversed when the 492P responds to parallel poll 2 An error 57 message may be displayed when the FREQ SPAN DIV is 2 kHz or less and the FREQUENCY is tunedto the end of the 2nd LO range the 2nd LO frequency istunedfor narrow spans To validate an error 57 message innarrow spans tune the FREQ...

Page 155: ...response The DELFR re sponse is also sent after the FREQ response These changes remove the uncertainty in how the SET query is executed with various combinations of instrument settings TROUBLESHOOTING ON THE INSTRUMENT BUS Instrument Bus Data Transfers The 492P can execute two commands and queries to aid troubleshooting of circuit functions that are interfaced to the instrument bus These functions...

Page 156: ...nt bus address command KADDr HEX D IC IT H hEX DIGIT hex d ic it H hex DIGIT 3784 165 HEX DIGIT A character in the sequence 0 through 9 and A through F representing a hexadecimal digit The two digits in order form a number to represent a location on the instrument bus If a character is not a hexadecimal digit or part of a pair of digits it is not used in executing the ADDR command and an error is ...

Page 157: ...be set for servicing these parameters control functions by setting the status or mode of 492P circuit assemblies Up to 16 pairs of characters are accepted to set a function to a new value repeatedly If a character is not a hex digit or part of a pair of digits the data byte formed by the pair is not executed and an error is reported Also an error is reported when data is sent to an invalid address...

Page 158: ...on for instance The meaning of the data is not fullydefined here refer to the description of the circuit mod ule in Section 5 for details To use the binary data and codes presented here with the DATA command and query presented above you must convert binary to hexadecimal This takes three steps 1 group the lower four bits and the upper four bits break the data byte in half 2 convert each group of ...

Page 159: ...ctor in dB div Video P rocessor refer to diagram 23 A register 7C controls out of band clamping video filtering and leveling see Table 4 7 Table 4 7 VIDEO PROCESSOR CONTROL 7C Bit Function DB5 DB6 DB7 Out of Band Clamp 1 1 0 No clamp 1 0 0 Clamp upper 5 div 1 1 1 Clamp lower div 0 1 0 Clamp lower 5 div DB4 DB3 DB2 DB1 Video Filter 0 0 0 0 Off 0 0 0 1 30 kHz 1 0 0 1 3 kHz 1 1 0 1 300 Hz 0 0 1 1 30 ...

Page 160: ...0 40 dB 0 0 1 50 dB 1 1 1 60 dB DB5 1 829 MHz 2nd Converter 0 2 GHz 2nd Converter DB4 1 EXT MIXER 0 RF INPUT DB3 Set to 0 for 100 ms to switch attenuator Bit Function Crt Control 5F DB3 1 max span dot 0 center frequency dot DB2 1 error or GPIB RDOUT message page 2 0 normal readout page 1 DB1 1 data sent to 2F is character address 0 data sent to 2F is character code DBO 1 readout on 0 readout off r...

Page 161: ...UN VIEW B 7 AUTO RESOLU TION PHASE LOCK INT RUN VIEW A 8 PULSE STRETCH ER UNCAL EXT TRIG SAVE A A 1 on DB3 initializes encoder power up Bit Functions Reading data from switch en co d ers F4 DB7 FREQUENCY dow n up 1 0 DB6 DBO Switch codes see Fig 5 39 Sw eep refer to diagram 33 The microcomputer writes to two registers OF and 1F to control sweep rate mode hoidoff interrupts and triggering see Table...

Page 162: ...7E is added for the 492P to make the PEAKING con trol programmable see Table 4 14 Table 4 14 1st LO DRIVER REGISTERS 72 AND 7E Bit Function 1st LO Driver Functions 72 DB7 Normal max span mode 1 0 DB6 Connect disconnect sweep voltage to driver 1 0 DB5 Driver off on 1 0 off for degauss DB4 Filter on off at driver output 1 0 on for unphase locked narrow spans DB3 External mixer disconnect connect 1 0...

Page 163: ...2nd LO high byte DB1 0 steers DAC data to 2nd LO mid byte DBO 0 steers DAC data to 2nd LO low byte DAC Data 71 DB7 DBO Data for center frequency DAC s steered by control register Center Frequency Control Read F0 DB7 1st LO DAC stored voltage comparator DBO 2nd LO DAC stored voltage comparator Phase Lock Control refer to diagram 40 A register 73 accepts data to preload the n n counter and control t...

Page 164: ...he display digitally via the IEEE 488 bus Manual operation of the 492 492P Spectrum Analyzer is accomplished through the front panel knobs and switches The 492P may also be operated via the IEEE 488 bus using a straightforward language format How It Works The Functional Block Diagram is located at the front of the Diagrams section It relates the major sections in the instrument and shows the main ...

Page 165: ... conver sion depending on the vertical display mode The video pro cessor filters the video if either the wide or narrow filter is selected The display section displays control settings on the crt based on data from the microcomputer The sweep is often rapid enough to give a flicker free display but at times the sweep must be slowed below the flickerrate With Option 02 the display can be recorded a...

Page 166: ...duced with a description of the sys tem using the block diagram found in the Diagrams section of the manual This is then followed with a description of each circuit board or major circuit within the system s 1ST CONVERTER CIRCUITS The 1st Converter mixes the incoming RF signal with a tunable local oscillator signal to produce intermodulation products All of these are filtered out except the 2072 M...

Page 167: ...ector is the signal path for frequencies from 1 7 to 21 GHz The Preselector is a tunable filter that tracks with the 1st local oscillator This prevents other RF signals from feeding through to the 1st mixer and eliminates spurious responses from external sources From the Preselector the signal passes through a 3 dB attenuator which improves the return loss of the Preselector to the 1st Mixer RF IN...

Page 168: ...t voltages and static discharges In analyzers equipped with Option 01 the Preselector and related circuit ry is placed between the step attenuator and the 3 dB attenuator 1st Mixer The 1st Mixer receives the RF signal through the 3 dB attenuator and generates the intermodulation products that are filtered to provide the low and high IF signals The mixer is a single balanced design which has less c...

Page 169: ...I 1 I I V I I 1 Directional Filter The Directional Filter FL16 couples the 2072 MHz signal to the 2nd Converter via the lowpass and bandpass filters As intermodulation products IM flow through FL16 they induce a selected current into a one wavelength distributed ring which couples the 2072 MHz IF signal out to FL11 the lowpass filter The remainder of the IM products pass on through since the ring ...

Page 170: ...r frequency signals from the mixer The 829 MHz 2nd Converter uses a phase locked volt age controlled oscillator to produce the 719 MHz signal that is mixed with the 829 MHz first IF signal The swept 2182 MHz 2nd local oscillator is used as a reference for the 719 MHz local oscillator The 719 MHz oscillator isdesigned so that it can be disabled upon command from the microcomputer in the IF selectio...

Page 171: ...e and consists of the mixer an operational amplifier bias circuit a delay line and a low pass filter In opertion both diodes of the mixer are turned on and off by the output signal from the 2181 MHz 2nd Local Oscillator through coaxial connector P183 Note that although the diodes are connected for opposite polarity both are turned on at the same time because of the 180 phase shift delay line inthe...

Page 172: ...resistor R1017 provide forward bias to the diodes The potentiometers provide for balancing the bias levels In operations in which the mixer is not active the IF SE LECT signal is high This reverses the states of the U1014 outputs and forward biases diodes CR1014 and CR1018 With these diodes conducting resistors R1014 R1016 R1017 and R1018 form two voltage dividers that set the reverse bias to the ...

Page 173: ...red at TP1015 with a high impedance voltmeter without signifi cantly disturbing the oscillator 2182 MHz PHASELOCKED 2ND LO General Description The 2182 MHz Phaselocked 2nd LO assembly contains a tunable microwave oscillator frequency reference circuit ry and phaselock circuitry within a two section housing Microwave circuitry is packaged within the machined alumi num portion of the housing Low fre...

Page 174: ... of the 2182 MHz Microstrip Os cillator The entire circuit board is housed in a magnetic shield to reduce spurious effects of external ac fields All power supply and control inputs enter the circuit board via feedthrough capacitors in the housing wall All connections with the microwave circuitry are through feedthrough ca pacitors C2200 C2204 in the floor of the housing The 15 V 15 V and 9V inputs...

Page 175: ...r tuned the Microstrip Oscillator sweeps and tunes an equal amount Within the control bandwidth of the lock loop the Microstrip Oscillator FM noise is reduced to that of the ref erence circuitry The phaselock loop bandwidth is controlled by R1024 C1026 and R1025 C1023 Unity gain for the phaselock loop occurs near 200 kHz with a gain slope of 6 dB octave The gain slope breaks to 12 dB octave for fr...

Page 176: ...t at 829 MHz At frequencies above or below the pass band the series resonators appear as large reactances shifting the primary signal flow through the 50 Ωresistors Also the out of band impedance of the parallel resonator is small compared to 50 Ω Thus the resistors are essentially grounded at one end terminating both the input and output ports A wide bandwidth is used to minimize losses in the re...

Page 177: ...refer ence supply Collector current is determined by resistor R5 Less current is used in the first stage than in the second because the first stage requires less intermodulation distor tion performance Reverse breakdown of the base emitter junction can degrade the transistor performance so a diode base clamp is provided in each circuit CR1013 and CR1022 for protection in the absence of the 12 volt...

Page 178: ...nt 50 Ωinterfaces for the 829 MHz bandpass filter The 829 Mhz bandpass filter is composed of four quar ter wave coaxial type resonators mounted on the 829 MHz 2nd Converter board The end resonators are tapped near their grounded end to facilitate the filter s input and output coupling Inter resonator coupling is provided by printed through the board capacitors that connect between the resonators a...

Page 179: ... open circuit The control signal from switch driver Q2015 is connected in a series path through the four diodes CR2011 CR2012 CR2013 and CR1015 and inductors L2011 L2013 and L2019 so that Q2015 sup plies only a small current to forward bias all four diodes This same diode bias current is used to turn off amplifier Q1011 110 MHz IF Select Circuits The 110 MHz IF Select circuits select the 110 MHz I...

Page 180: ...r provides the 719 MHz frequency that is mixed with the 829 MHz IF sig nal to produce the 110 MHz IF signal that is supplied to the 3rd Converter In the following description the circuits are referred to as the 719 MHz LO The 719 MHz LO consists of a phaselock loop a 719 MHz output circuit and a 2nd LO front panel output circuit Refer to Diagram 14 while reading the following description Phaselock...

Page 181: ...ndesired harmonic mixer products The harmonic mixer produces not only the required 25 MHz difference frequency but also many other higher order products Two in particular those at 744 MHz and 694 MHz are separated from the 719 MHz oscillator fre quency by only 25 MHz Were it not for the isolation pro vided by amplifiers Q1021 and Q3021 these two products could be converted in the 829 MHz mixer and...

Page 182: ...igh enough to cause the 719 MHz oscillator to track the sweep of the 2182 MHz ref erence oscillator In addition the compensation amplifier limits the loop bandwidth to 100 kHz to make certain that the loop will not oscillate Note that the differential inputs to the amplifier each include a lowpass RC filter R3041 and C3042 for the minus input R2048 and C2055 for the plus input to attenuate the und...

Page 183: ...n and an attenuator Since the first two mixers in the RF system offer no high frequency gain it is important that this amplifier exhibit low noise characteristics Also it must be relatively free from third order intermodulation distortion Signal input to the amplifier is from the 2nd Converter through coaxial connector P321 This signal is nominally 110 MHz and is applied to an impedance matching b...

Page 184: ... of the diodes is relatively constant resulting in a good impedance match over a broad range Dependent upon the exact amount of current through CR3030 part of the RF signal path is through that diode to the output amplifier and part is through R2032 and diode CR1029 to ground This results in reduced signal attenuation REV FEB 1983 If R1015 is set to the positive limit the entire 2 mA flows through...

Page 185: ...or circuit the output is RC coupled to driver stage Q2036 The driver is a feedback amplifier that provides output power on the order of 10 dBm to drive all of the reference amplifiers plus the mixer amplifier The output is transformer coupled from the collector circuit Reference Amplifier Circuits The reference output circuits consist of four identical low gain common emitter amplifiers with relat...

Page 186: ...equired in those bands In order that each division of signal change on the crt screen be equal to that for each other division and be equvalent to a similar signal level change in dB a logarith mic amplification of the signal is required This is done by a seven stage amplifier that produces an output that is pro portional to the logarithm of the input Thus the screen dis placement can be selectabl...

Page 187: ... appears to be merely a resistor to RF At the same time the voltage drop across R4012 is sufficient to reverse bias CR3012 The same operational sit uation exists for the filter output switch Q3055 Resistors R3057 and R1067 establish the current to forward bias CR3061 and reverse bias CR3060 Thus the signal from the Input circuit via jumper B is applied through the selected filter and transmitted t...

Page 188: ... This signal is applied to a chain of three common emitter amplifiers each using emitter degen eration Changing the emitter resistance is used to change amplifier gain under the direction of the microcomputer The nominal gain of the complete circuit is 6 dB with Q2018 Q2042 and Q1062 biased off This provides a nomi nal 16 dBm output In this condition control pins V and Y are high causing switching...

Page 189: ...er board 2 with the indi vidual resistor selected by the microcomputer The second block is similar except that the gain change occurs inone step of approximately 12 5 dB This gain step occurs only in the higher bands and is activated by the microcomputer through user selected diodes on the VR mother board 2 The 492 492P is normally calibrated with the band 1 gain control resistor set for minimum g...

Page 190: ...he other reso lution circuits The 100 kHz filter is a double tuned LC circuit that is designed for a good time domain response shape Variable capacitors C2050 and C5055 provide for filter tuning A 6 dB attenuator resistors R2048 R2047 and R2049 is in cluded at the filter input This attenuator and the filter form a reference to which the levels of the other circuits are cali brated Impedance matchi...

Page 191: ...res data for bandwidth selection and the latch that stores data for band identifica tion and gain step selection Data lines from the analyzer data bus are applied through connector P1049 pins 1 2 3 4 5 6 and 8 to data latches U3010 and U3017 Note that only data bits 0 1 and 2 are applied to latch U3010 Latch U3010 stores the data that selects among the fil ters in the 1st and 2nd Filter Select cir...

Page 192: ... level signals For the output signal to be proportional to the logarithm of the input more gain is re quired for a change from 90 dBm to 89 dBm than a change from 1 dBm to 0 dBm Thus for a given stage of the seven the gain starts at approximately 10 dB for a low level signal and decreases to unity as the input signal level increases In the first three stages the gain becomes less than unity as the...

Page 193: ...st three stages is described afterward Fig 5 11 Ends of logging range When the input level to transistor Q3015 is less than ap proximately 60 millivolts peak to peak the transistor con ducts enough to maintain forward bias on both series limiting diodes CR4015 and CR4012 The RF signal path at that level is through the diodes capacitor C5014 and resis tors R4010H R4010B R4015 and R4010D to common b...

Page 194: ...diode is con ducting it is necessary that the output change rapidly through that zone Note that the network consisting of re sistors R5032 R5029 R5020 and capacitor C5029 is in cluded to stabilize the dc operating point Figure 5 12 shows a simplified schematic diagram of the detector circuit As shown in this diagram two detector di odes CR5033 and CR5027 are used but only the positive half cycle i...

Page 195: ...ompensation for front end response variations Video filtering the second function performed by this circuit block allows for selection of six video bandwidths 30 kHz 3 kHz 300 Hz 30 Hz 3 Hz and 0 3 Hz under control of the instrument microcomputer The third function is out of band blanking This blanks the upper and lower ends of the local oscillator swept frequency range to provide a selected windo...

Page 196: ...ls from the Sweep section the Crt Readout logic the Deflection Amplifiers and the Digital Storage logic VIDEO AMPLIFIER Refer to the block diagram adjacent to Diagram 22 The Video Amplifier circuits provide for the selection of either logarithmic or linear display mode for the selection of dB per division in logarithmic mode for selection of pulse stretching in narrow peak signal operations and fo...

Page 197: ...itches on the front panel 4 output Reference Level potentiometer R4081 is adjusted for a full screen display The gain switching network provides for switching 15 re sistance values into the feedback path of variable gain log amplifier U4090B and consists of four FET switches Q4075 Q4070 Q5070 and Q5075 and four resistors R7071 R6074 R6073 and R6082 The FET switches controlled by data bits 0 1 2 an...

Page 198: ...ine of the signal that results from the frequency is shifted about one division so the alternate display is right below the other display Thus if the display is two similar signals separated in amplitude the signal is true This offset is inserted from the analyzer data bus through latch U6050 and buffer U6060 to the summing node of the output amplifier U4090C Digital Control Circuit The Digital Co...

Page 199: ...ed and the output from the offset amplifier U2055A is supplied out as the VIDEO 1 signal at edge connector pin 49 Minor compensation is required for band 1 only when preselection is specified Option 01 With Option 01 a mi nor slope caused by the 1 8 GHz lowpass filter and 2 GHz limiter is corrected by adding two resistors inseries between the PRESELECTOR DRIVE signal input and the VIDEO 1 output s...

Page 200: ... of the six bandwidths Note that data bits 2 3 and 4 are applied to switch U2015 pins 8 16 and 9 respectively to select components From buffer U2066 the signal is applied through con tacts 7 and 6 of switch U3063 and edge connector pin 57 as the Video Filter Out signal Table 5 7 FILTER COMPONENT COMBINATIONS I I I I Bandwidth DB 1 R2023 C3026 R2021 R2022 C2016 30 kHz 1 X X X X 3 kHz 1 4 X X X 300 ...

Page 201: ...This blanking is under the control of the microcomputer DIGITAL STORAGE The addition of Option 02 to the basic 492 492P provides the operator with the capability of selecting the method for displaying and processing information contained in the digi tal storage memories This allows operations such as deter miningthe highest amplitude that occurred during a selected period MAX HOLD mode storing a s...

Page 202: ...ains the horizontal acquisition address counter horizontal display counter 10 bit RAM address multiplexer and a programmable logic ar ray system control matrix The remainder of the digital storage control circuits consists of two 8 bit digital to ana log converters two 10 bit digital to analog converters one 10 bit latch 8k bits of random access memory and various ancillary circuits Timing is cont...

Page 203: ... 0 Q 3 HI 2 ps 0 V E R T I C A L D I S P L A Y M A X HOLD ELAN KINQ L C G i C 24 B L A N K I N G t t U X M E M O R Y O U T P E A K A V Q S E L E C T O R r S U B T R A C T O R M I N U E N D R E i i i S T E K PEA K s u b t r a h e n d NUMERATOR REGIS TER R E G IS T E R R O I S T E R 2 5 B IT ZS S H I F T f REGISTER PE AK 17 to 1 DATA DETECTOR CONCENTRATOR S T A R T D I V i D E H I C LO C K 20 IN T E...

Page 204: ...y SYNC are transferred to the vertical display output latch display register on the block diagram The same shift regis ter is used for other purposes so the DISPLAY ENABLE signal prevents non display information from being trans ferred to the output latches An example of data moving through this shift register is that during the B minus A dis play mode The A value is first read from memory and sto...

Page 205: ...igh This signals the horizontal control circuit that access to memory is required When the horizontal circuits recognize that request those circuits pull the BUS REQ line low at the same time that SYNC is low The interface logic detects the BUS REQ and SYNC low condition through U1013A U1013B U2011A and U2012C and produces the low BUS GRANT signal to indicate access to memory The 5 42 BUS GRANT si...

Page 206: ...put from the U2032 10 bit up down counter and converts that output to an analog current that is subtracted from the sweep signal which is applied at the edge connector pin 60 and through buffer U2044B The re sult of this subtraction is then supplied to up comparator U2038A and down comparator U2038B to produce the UP or DOWN signal as appropriate to control the direction of the count of the 10 bit...

Page 207: ... e REQt STER S U M T E R M S DI SAB LE CC JNT Λ 36 DISPLAY ENABLE 3 5 J C G M P A E 24 R E A D W R I T E B A D I S P L A Y S T A T E R E G IS T E R 2O JMARKER A S 9 E T DISPLAY COUNTER N 1 0 b i t U P D O W N R E G I S T E R 10 10 UP W SB 10 BIT UP DOWN COUNTER LSB H l e f t r i c h t I 0 I H 8 7 40 6 H D MIX H D H D H D H D i LSB H P A B H O R IZO N TA L I DISPLAY 21 START D IVID E 9 D 8 7 0 6 S ...

Page 208: ...eadout circuits Selec tion between these two signals is controlled by the R O OFF signal also from the Readout circuits through edge connec tor pin 3 When R O OFF is floating or pulled high the signal from buffer U7073 is transmitted through the switch when the line is pulled low the HORIZ R O signal is selected From U7055 the signal is applied to a shaper network to compensate for non linearity i...

Page 209: ...er U2062 operate the same as the horizontal section Transistor Q4078 limits positive excursions to ap proximately one division below the top of the screen to pro tect the output stages from being overdriven The vertical output stages are similar to the horizontal stages with the exception of higher bias current Current flow of approximately 1 mA through resistors R3095 and R3098 result in approxim...

Page 210: ...utput of the oscillator approximately 200 Vac is coupled across T2065 where it is stepped up for applica tion to the Voltage Doubler and stepped down for applica tion to the crt filament Voltage Doubler The voltage doubler consists of CR4041 CR4035 C4027 C5021 C4024 R3038 and R1039 The output of the doubler is taken off the anode of CR4035 and applied to the crt cathode Reference voltage for the r...

Page 211: ...generator to unblank the crt beam 4 D A converters to deflect the crt beam 5 instrument bus interface to store characters and control display A more detailed block drawing is provided with the schematic Diagram 29 Up to 32 characters can be displayed in a line across the top of the crt and another line across the bottom either of two sets of characters page 1 or page 2 can be selected for display ...

Page 212: ...al from the character generator IC to draw the character These counters U2016 U2012 and U2018 are wired as a module 4096 counter to count the column bits 0 2 the row bits 3 5 and position of the character bits 6 11 Bits 6 through 10 represent the horizontal position and bit 11 the vertical position top or bottom The position bits also address the character in RAM assuming the readout is turned on ...

Page 213: ...e figure the character generator finishes a character When the counter advances decoder U1014 asserts ROW 0 COL 0 resetting the GEN ON flip flop on the next clock This stops the counter at row 0 column 1 2 on the figure When U2044 completes the time out period and again sets the GEN ON flip flop the character counter resumes the scan first causing LE at 3 and LINE at 4 Just before the scan en ters...

Page 214: ...TA when it sees a value of 2 The decoder must be enabled by GEN ON low and DATA VALID high on the instrument bus The false transition of DATA VALID causes the addressed port to latch the data on the instrument bus Control Port The control port U2034 turns the readout on or off steers data sent to the address data port and controls the mode of the frequency marker dot The lower four bits are define...

Page 215: ...D to gate the clock signal that latches the address The positive clock transition is applied to U2024 when DATA VALID goes false at the end of a write cycle to the address data port releasing DATA Bit 1 interprets data sent to the address data port as an address 1 or data 0 for the character RAM Setting this bit disables the character RAM for input and sets up the clock signal to latch the address...

Page 216: ...t 7 is used to reduce readout display overhead It is set when a space is transferred to the character RAM so the readout does not steal time from the spectrum trace to scan a blank When set this bit prevents the GEN ON flip flop from gating R O OFF low through U2032C Frequency Dot Marker The frequency dot marker is refreshed immediately after the last character position in the lower readout is sca...

Page 217: ...U 20 A2B L U20328 o RETRACE U2D42A m COLUMN HORIZ ADDRESS HORIZ D A VERT D A RETRACE ONE SHOT U2042A 0 UNBLANK ONE SHOT U2042B Q 5 9μ f Y 5 μ R O OFF GATE IN U1038B 5 FREO DOT Λ R O UNBLANK GATE IN U2032B 5 DISPLAY DOT J V r R O UNBLANK R O HORIZ Fig 5 23 Frequency dot marker circuit and timing 5 54 r e v AUG 1981 ...

Page 218: ...nt to drive the 1st LO 2 produces the tuning and sweeping signal for application to the Preselector Driver circuits 3 produces the mixer bias voltages 4 produces the BUFFERED TUNE VOLTS signal that is applied to the Display section 5 produces a reference voltage that is used in both the 1st LO Driver circuit and the Preselector driver 6 produces a supply voltage for the 1st LO Preselector Driver T...

Page 219: ... This input is driven by the output of multiplexer U6102 Operation of the circuit is as follows The 1 to 10 V reference from U4095 is applied to U6092B which changes this level to 1 2 V which connects to one side of the timing resistors connect ed to U6102 A 4 V difference then appears across the tim ing resistor Multiplexer U6102 decodes instructions from U3042 the OF port latch and connects only...

Page 220: ...ncreased When the output of U4026C rises the hoidoff capacitors charge to 5 V through R3027 Capacitor C1013 is always in the hoidoff circuit When U2043 latches Q4 or Q5 high this produces a low out of U4026F or U4026E which in creases hoidoff time by adding C3028 or C3027 into the hoidoff circuit Diodes CR3034 and CR3035 protect the two inverters from reverse voltage transients that might pass thr...

Page 221: ...blish the frequency span Re fer to the block diagram adjacent to Diagram 35 The Span Attenuator consists of digital control circuits which receive and decode the address and instructions from the microcomputer the input amplifiers which perform noise re duction and signal inversion on the incoming sweep signal the digital to analog converter which attenuates the sweep signal to the desired amplitu...

Page 222: ...d sends the appropriate codes to the data latches which in turn control the attenu ation factor of the digital to analog converter This stage consists of converter U1042 amplifier U2042 and a com plementary pair Q2062 and Q3056 that form the output current buffer Figure 5 25 illustrates a simplified two bit digital to ana log converter The circuit works by current division Since the summing node o...

Page 223: ...uce voltage drop Feedback for the output stage is provided by R1056 plus an internal resistor in U1042 The internal feedback re sistor ensures better temperature tracking The internal re sistor provides a gain slightly less than unity R1056 increases the stage gain and permits gain calibration as described below One of four decoder U4025 using the data from the Q4 and Q5 lines from U2015 controls ...

Page 224: ... the re quired mixer bias connects or disconnects the TUNE VOLTS and SPAN VOLTS signals for the summing amplifi er energizes the filter switch for the 1st LO and controls the drive and filtering of the oscillator driver stage 2 the tune volts buffer buffers the COARSE TUNE VOLTS signal from the Center Frequency Control circuits and re duces the signal amplitude to drive the dot marker circuits 3 t...

Page 225: ... until the coil current has decayed Summing Amplifier This operational amplifier circuit consists of amplifier U2032 complementary pair Q2035 Q2039 and related components The feedback re sistance for this circuit is R1038 The input resistance is R2027 for the COARSE TUNE VOLTS input and R2031 for the SPAN VOLTS input R2030 is switched across R2031 as mentioned earlier to increase stage gain for ma...

Page 226: ... by U3022 which is the current source for operational amplifier U2018 The output of U2018 is a bias voltage that REV AUG 1981 is fed to either the Preselector Driver board where it is summed with the drive voltage for the Preselector or it is fed through U1016 U1025A and Q1025 Q2025 to the 829 MHz Diplexer then through RF circuitry to the 1st Mix er or external mixer port Oscillator Collector Supp...

Page 227: ...of 2 1 GHz volt The voltage is directly proportional to frequen cy thus the offset is such that if the oscillator could operate to 0 Hz the voltage processor output would be at zero volts at the same time U2028 as directed by the microcomputer multiplies the input signal by one or three to transform the input signal to represent effective oscillator frequency in bands 4 and 5 when the 3rd harmonic...

Page 228: ...the non linear action of the YIG tuning The front panel PEAKING control applies a small offset through R5065 to the input of the current driver stage This corrects for non linearity or temperature drift in the 1st LO or Preselector Current Driver This stage consists of output stage Q5065 Q5052 FETs Q3061 Q3077 and Q2074 amplifiers U2054 and U3054 and transistor Q4037 FET Q2074 as controlled by the...

Page 229: ... It furnishes a regulated 7 7 V to the Cavity Oscillator This voltage is derived from the regulated 12 V The operating bias for Q3035 is set by the voltage divider in the base circuit which fixes the emitter voltage at 7 7 V 8 2 Volt E Supply This circuit consists of compara tor U3025 emitter followers Q4026 and Q4024 and sur rounding circuitry Part of the function of this circuit is to ensure tha...

Page 230: ...er data to control the other circuits 2 the coarse and fine storage registers latches which store the numerical bytes that control the DAC digital to analog converter stages 3 the coarse and fine DAC stages which convert the digi tal inputs from the storage registers into analog current and voltage equivalent values 4 the coarse and fine track hold amplifiers which store the analog output values d...

Page 231: ...the tracking mode where the preamplifier and integrator are connected together by the disconnect stage and the entire unit acts as an operational amplifier Figure 5 28 illustrates the basic circuit While the circuit operates in this mode the amplifier tracks the DAC stage and sends the voltage out to the tuning circuits When the transfer of bits from the lower to the upper DAC is required the micr...

Page 232: ...f the Q1 and Q8 lines the hold track selector transistor for each converter side Table 5 17 illustrates the format for ADDRESS 70 Addresses are expressed as hexadecimal numbers Table 5 18 lists some of the significant states that are used to tune the DAC Table 5 17 ADDRESS 70 FORMATS DBO Fine Tune hold DB1 Fine Tune low byte enable DB2 Fine Tune mid byte enable DB3 Fine Tune high byte enable DB4 C...

Page 233: ...er for the feedback system shown in Fig 5 28 Under normal circum stances the incoming signal is routed through R2046 To improve the amplifier s slewing rate CR2044 and CR2045 conduct to connect R2047 in parallel with R2046 when sig nals in excess of one volt are applied This speeds up the response of the circuit when large scale tuning changes are required When the hold mode is selected line Q8 B7...

Page 234: ...he microcomputer now moves the strobe to the middle of the bandwidth about 250 kHz away then takes three small steps closer while noting the change in error frequency with each step With this information the microcomputer can compute the position of the 1st LO frequency does so and places the strobe within approximately 10 kHz of the 1st LO frequency Then the microcomputer commands lock which puts...

Page 235: ...ows DO This line carries the data that preloads the η N counter in the synthesizer circuits bit by bit in serial format D1 The N LATCH signal is sent on this line It is used to latch the N DATA into the synthesizer counters D2 Reserved for future applications D3 This signal resets the buffer sequencer at the outset of a talk cycle for the counters D4 This line CONTROL LATCH latches a control word ...

Page 236: ...uter releases the Y7 line which increments U2078 and disables U4074A This in turn disables all three buffers and clears the data bus If the VAL IDCOUNT line is high when the microcomputer interrogates the stage the data from U4025 is accepted the microcomputer then re addresses U7055 which increments U2078 and U2036 is enabled instead of U4025 The microcomputer accepts that data then once more inc...

Page 237: ...ro computer sends data and a data clock to load a number into the latches which accept and store serial data The num bers that come from the microcomputer range from about 3300 to 3830 so the count remaining until the counters overflow is from about 265 to 795 When the number is loaded the N LATCH signal transfers the number from the input shift registers to the output registers of U2020 and U2030...

Page 238: ...3 to move low closing the feedback path for the inverting side of U2048 This decreases the bandwidth ensuring that the amplifier cannot break into oscillation until phaselock is broken It also improves the close in noise performance of the phaselock loop Window Comparator This circuit consists of U1015 and the associatd components and is used to sense when U2048 has approached its operating limits...

Page 239: ...onics and feeds the signal to the isolation amplifier This stage furnishes the positive feedback drive to the reso nator stage and isolates the bandpass filter from the reso nator stage The resonator stage consists of crystal Y1012 varactor diodes CR1011 and CR1012 and related components The stage operates within a frequency range of 25 032 to 25 094 MHz controlled by the voltage applied to varact...

Page 240: ...ollower Q2091 and AND gate U1091A and U1091B The Controlled Oscillator signal is applied to the clock input of counter U1 0 2 2 which is wired to divide the input signal by five The STROBE ENABLE 1 line from the Error Amplifier permits the counter to operate when the line is low and is the means by which the microcomputer can shut off or turn on the strobe pulses The output of the counter which ra...

Page 241: ...mentary and non overlapping They are divided by 4 from the oscilla tor frequency for a processor clock frequency of about 850 kHz The φ2 CLK is buffered for use by the rest of the microcomputer system and is in phase with the φ2 clock signal used by the 6800 The undivided oscillator frequency signal is distributed as CRT CLK for crt readout timing RST stays low while C3042 charges following power ...

Page 242: ... input is tied low so the address buffer and read write line are always enabled Read Write R W This output sets the direction of data flow high when the 6800 is reading data and low when the 6800 is writing data It is also high between read and write operations Valid Memory Address VMA This output is asserted high when the 6800 places a valid address on the microcomputer bus It enables the memory ...

Page 243: ... the bit If the bit is clear the microcomputer sets the bit and then starts an interrupt sequence 1 Push the contents of the program counter index reg ister accumulators and condition code register onto the stack decrementing the stack pointer each time a byte is stored 2 Set the interrupt mask bit and load the address stored at FFF8 the interrupt vector NOTE 6800 addresses are given as hexadecima...

Page 244: ...Theory of Operation 492 492P Service Vol 1 SN B030000 up REV AUG 1981 5 81 ...

Page 245: ... them It then continues executing the oper ating program according to the flow chart in Fig 5 33 6800 Address and Data Bus The 6800 address outputs are buffered by U2035 and U3036 they are always enabled The data I O buffer U1013 is normally enabled If disabled by P1020 it isolates the 6800 from the microcomputer bus data lines for diagnostics See further information about diagnostics un der Addre...

Page 246: ...oded there and do not rely on address select lines from the Processor board U2044 is enabled by VMA and zeros on A15 and A14 3FFF and below It decodes the 3 bit binary input of A11 A12 and A13 to assert one of eight outputs Y6 and Y7 are unused U1037B is enabled when U2044 decodes an address in the range 1000 17FF and decodes A9 and A10 to assert one of four outputs Address Map Microcomputer memor...

Page 247: ... shown in Table 5 23 Enable The φ2 clock high pulse transfers data to the input register and enables one of the peripheral interfaces if addressed on a write cycle Data Direction Registers These registers allow the MPU to control the direction of data on each line connected to the peripheral interfaces A zero 0 configures the corre sponding data line as an input a one 1 configures it as an output ...

Page 248: ...rface when it interrogates a register on the instrument bus Pull ups on the data lines result in all ones if a read cycle inputs a byte when no instrument bus register is enabled The RC delay in the enable signal for buffer U3016 slows the low high transition at the input of the Schmitt trigger but has little effect on the high low transition This holds the instrument bus data lines stable while D...

Page 249: ...adout control Crt Readout 5F When the 6800 reads from the instrument bus it does not configure the PIA to pulse DATA VALID as it does for a write cycle Rather the 6800 writes to control register B to set CB2 low CB2 low asserts DATA VALID after the RC delay allowing for the data to be accessed and the 6800 then reads the data through peripheral interface B After reading the data the 6800 writes ag...

Page 250: ...ds the interrupt status of the GPIA on the GPIB board separately and combines it with the instrument bus status before servicing the interrupt s Interrupts are serviced according to their priority MEMORY BOARD The Memory board holds the ROM operating program for the microcomputer and the RAM used by the program It also holds a bank of switches that the microcomputer can read to configure itself fo...

Page 251: ...e wired in a matrix that is read by a keyboard encoder this is the main switch encoding block A power up circuit prompts the encoder to output the initial value of the rotary switches The FREQUENCY control drives a separate up down encoder Each encoder interrupts the microcomputer when it senses a change and transmits its data through the instru ment bus port The LED display inputs data through th...

Page 252: ...ows Buffer U1047 is enabled only when the output path is addressed Switch Encoding A keyboard encoder U3039 scans the switch matrix continuously and compares any switch closures it senses with those sensed during the last scan Any new closure causes the encoder to request service so the microcomputer can read the code for the switch How the encoder scans the matrix is illustrated in Fig 5 37 By as...

Page 253: ...erface The encoder strobe output is level controlled by the switch interrupt interface When the encoder asserts its strobe output high it causes U3014C to pull down on SER REQ The strobe high also releases the preset input to U2018B which was holding the keyboard encoder strobe control input low Since the encoder is waiting for a low to high transition on this input to stop asserting its strobe ou...

Page 254: ... contacts After the keyboard encoder is initialized the microcomputer resets bit 3 This restores the switch matrix to normal operation and the keyboard encoder reads the position of the rotary switches as changes in the switch matrix It outputs these apparent changes to the microcomputer which interprets them as the power up val ues for TIME DIV and MINIMUM RF ATTENUATION and the initial switch po...

Page 255: ...3E 48 2 dB MAX 2 ms 5 s DIV UN HOLD 30 dB 03 0D 17 21 2B 35 3F 49 BASE VIEW NARROW LINE 5 ms 1 s B FILTER CLIP 40 dB 04 0E 18 22 2C 36 40 n E 10 dB WIDE S 1 ms 2 s DIV FILTER AF 50 dB 0 L SWITCH NAM 05 OF 19 23 2D 37 U 41 OR POSITION VIEW I 0 T 2 ms 5 s DEGAUSS A CAL 60 dB N LIN 06 10 1A 24 2E 38 B 42 Λ r 21 MIN PHASE AUTO Γ HEX CODE 5 ms AUTO NOISE LOCK RES 07 11 1B 25 2F 43 PULSE RESET FREQ FREQ...

Page 256: ...Theory of Operation 492 492P Service Vol 1 SN B030000 up Fig 5 40 Frequency control encoder timing ...

Page 257: ...ion of data through the data lines buffer U2025 depending on the sense of the MSB of the address AB7 When INTL CONT is low it sets U2038 to drive the buffer in a manner similar to the Processor board data buffer a write to the internal bus if AB7 is low and a read if AB7 is high When INTL CONT is high the buffer is enabled to write to the external bus when AB7 is low and read when AB7 is high The ...

Page 258: ...ith a reference voltage and gates the invert er logic circuits off and on to control the inverter duty cycle and thus the effective primary voltage The inverter driver stage amplifies the signal from the inverter logic circuit and drives the output stage The output stage consists of two power switching transistors that drive the primary of the main power transformer T4071 Primary overcurrent sense...

Page 259: ...081 C1063 and transformer T4071 The output transistors are connected in a half bridge configuration converting the previous push pull output to a single ended configuration The two transistors drive the se ries tank which acts as an energy storage element and an averaging circuit Output transformer T4071 is driven by the tank circuit and in turn drives the secondary circuits Primary regulation as ...

Page 260: ...inding of T4071 is pins 13 14 and 15 which furnish current to full wave bridge rectifier CR5052 CR5062 CR5065 and CR5055 The output of this rectifier is also divided to become the 17 V and 17 V supplies The 17 V supply is used only on the power supply board the 17 V supply is used both on the board and elsewhere in the 492 492P Voltage Reference Supply The 17 V is fed through R6021 and R6020 to th...

Page 261: ...cy deter mining components When the analyzer is energized one of 5 98 the three ring counter stages begins conducting before the others owing to circuit imbalances Assume that the upper stage Q1025 and Q1020 begins conducting before the oth ers The collector voltage of Q1025 is near 17 V which fixes that point as the most negative in a ring consisting of R1032 R1029 R1028 R2036 R2034 and R1036 Sin...

Page 262: ...sed for com munication between the 492P microcomputer and the GPIB Some registers provide a link between the microcomputer and GPIB others are used by the microcomputer to control the GPIA and obtain status information The registers are addressed by signal lines RS0 through RS2 and the DBIN input connected to the microcomputer read write line DBIN high selects read registers DBIN low selects write...

Page 263: ...Theory of Operation 492 492P Service Vol 1 SN B030000 up Fig 5 43 9914 GPIA block diagram 5 100 REV AUG 1981 ...

Page 264: ...ress Status Read 0 1 0 1 Bus Status Read 0 1 1 1 Auxiliary Command Write 0 1 1 0 Address Switch Read 1 0 0 1 Address Write 1 0 0 0 Serial Poll Write 1 0 1 0 Command Pass Through Read 1 1 0 1 Parallel Poll Write 1 1 0 0 Data In Read 1 1 1 1 Data Out Write 1 1 1 0 The bus management buffers in U1011 are automatically configured by TE and ATN to operate in the required direc tion driving DAV and EOI ...

Page 265: ...ations this degradation cannot be specified In a typical fan cooled rack degradation increases by a factor of two This section describes characteristics of the rackmount benchtop versions mounting procedure and servicing procedures for the rackmount benchtop instruments Frequency response and display flatness performance for Option 31 installation typically degrades up to 2 dB in the negative dire...

Page 266: ...Handling The bail for tilting the instrument shall be folded and the semi rigid cables from the front panel connectors to the front grill connectors Option 31 shall be re moved for this test Transportation Package vibration Meets National Safe Transit Association s pre shipment test project 1A B 1 when correctly packaged One hour vibration of 1 G Package drop Operable after a 24 inch drop on any c...

Page 267: ... be need ed for this installation Height At least nine inches of vertical space is required to mount this instrument in a cabinet rack Width Minimum width of the opening between the left and right front rails of the rack must be 17 9 inches This allows room on each side of the instrument for the slide out tracks to operate freely permitting the instrument to move smoothly in and out of the rack De...

Page 268: ... the rack are tapped for 10 32 screws the front flanges are mounted outside of the rails If the front rails of the rack are not tapped for 10 32 screws the front flanges are mounted inside the front rail and a bar nut is used Figure 6 4 shows these methods of mounting the stationary sections Use the following procedure to install the rackmount ver sion in a rack 1 select the proper front rail moun...

Page 269: ...ou need the rackmounted instru ment secured better than the latches on each side provide cut out the vinyl cover around the hole with a sharp knife Install the securing screws as shown in Fig 6 2A if the rackmount version is extended out of the rack and tipped up to gain access to the bottom or back panels of the instrument it can swing past center and fallback into the rack unless it is held Use ...

Page 270: ... rack and place it on a bench If the rack does not have a rear rail or if the distance between the front and rear rails is too great the instrument may be mounted without the use of the slide out tracks Fasten the instrument to the front rails of the rack with the securing screws This mounting method should be used only if the instrument will not be subjected to shock or vibration and it is instal...

Page 271: ...ch as a screwdriver to push the end of the EMI strip down while pushing the panel forward 4 The EMI strip can be replaced by removing the back feet mounting plate and sliding the strip out of its channel m REV JUN 1982 Installing Semi rigid Coaxial C ables th at A ccess the C abinet Rear Panel C onnectors to the Front Panel of the Instrum ent Option 31 1 Remove the 492 492P instrument from the cab...

Page 272: ...ront panel and screw them into the front rails of the rack TO REMOVE THE 492 1 Remove the securing screws and washers 2 Pull the instrument outward until the stop latches snap into the stop latch holes 3 Disconnect the power cord 4 Press both stop latches and pull the instru ment out of the rack Fig 6 6 Procedure for inserting or removing the instrument 5 Position the cables with RF connectors in ...

Page 273: ...ce a cable in place if it does not fit c Screw the nut on finger tight to ensure it is not cross threaded d Use a 5 16 inch open end wrench to tighten the nut to 8 to 10 inch pounds torque PREPARING THE INSTRUMENT FOR CALIBRATION OR MAINTENANCE Before the 492 492P instrument can be removed from the rackmount benchtop cabinet the fan must be removed After the instrument is removed from the cabinet ...

Page 274: ...rack DEEP RACK CONFIGURATION SHALLOW RACK CONFIGURATION 8 3 2 FHS screw 2 e a SHALLOW RACK CONFIGURATION BHS screw Stationary section of slideout track A Rear rail ta p p e d for 10 32 screws B U n tap p ed rear rail Fig 6 8 Alternative method of installing the instrument using rear support brackets 6 10 s V REV AUG 1981 ...

Page 275: ...e adjusted expressed in hertz Full Span Maximum Span A mode of operation in which the spectrum analyzer scans an entire frequency band Zero Span A mode of operation in which the frequency span is reduced to zero Envelope Display The display produced on a spectrum analyzer when the resolution bandwidth is greater than the spacing of the individual frequency components WITHOUT DAMAGE The maximum pow...

Page 276: ... the response curve ifit is measured either by manual scan true static meth od or by using a very low speed sweep quasi static method Shape Factor Skirt Selectivity The ratio of the fre quency separation of the two 60 dB 6 dB down points on the response curve to the static resolution bandwidth Zero Pip Response An output indication which corre sponds to zero input frequency NOTE Theratio may be ex...

Page 277: ...esired response by the fundamental or harmonic of the power line frequency Noise Sidebands Undesired response caused by noise internal to the spectrum analyzer appearing on the display around a desired response Residual Response A spurious response in the ab sence of an input signal Noise and zero pip are excluded TERMS RELATED TO DIGITAL STORAGE FOR SPECTRUM ANALYZERS Digitally Stored Display A d...

Page 278: ...to printing and shipping requirements we can t get these changes immediately into printed manuals Hence your manual may contain new change information on following pages A single change may affect several sections Since the change information sheets are carried in the manual until all changes are permanently entered some duplication may occur If no such change pages appear following this page your...

Page 279: ...ons C o n n e c t a c a bl e f r om the 2 n d L O output to the R F INPUT and tune to the sign al at 2 1 8 2 MHz S p a n douin to 10 MHz DIV and ce nt er the signal P r e s s A U TO P E A K and n o t e that PEAKING is d i s p l a y e d on the crt an d s e v e r a l sw ee ps are taken with v a r y ing p e a k i n g settings A f t e r a nu mber of sweeps the normal r e ad out returns and the signal ...

Page 280: ...t h p r e s e l e c t o r for b e t t e r si gnal s y m m e t r y in the digi tal ra dio bands A na r r o w 30 Hz V i de o F i l t e r for r e s o l u t i o n b a n d w i t h s e t t ing of 100 kHz a p p r o x i m a t e 1y 1 3 0 0 0 of the r e s o l u t i o n b a n d w i d t h to impr ove a m p l i t u d e v a r i a t i o n a n a l y s i s at s p e c i f i c f r e q u e n c i e s and fr eq uency s...

Page 281: ... A N D I V to 5 MHz 2 M o d u l a t e the Comb G e n e r a t o r wi th 0 2 ϋ m a r k e r s from the time mark ge nerator 1 3 Ad j u s t R1 071 Fig 3 31 for 1 m a r k e r d i v i s i o n 0 1 over the center six d i v i s i o n s 30 Hz is no less th an 6 d i v i s i o n s or more than 6 0 6 divisions 4 Tune the C e n t e r F r e q u e n c y to 11 GHz and ch eck s p a n d i v a c c u racy If n e c e ...

Page 282: ...10 MHz i 1 0 MHz powe r ou tp ut wi th 30 dB in put and signal at full sc reen band 1 n o m i n a l o u t p u t im pedsnc 50 ohm 0 dBm in M I N D I S T O R T I O N mode only band 5 4 0 dBm 1 dB c o m p r e s s i o n of ou t p u t y 0 dBm Ib k t r o n iX MANUAL CHANGE INFORMATION coM M rTTEDtoE X C E L L E N C E Date 5 2 84_________ Change Reference Π Π 1 Sfl _____ P r o d u c t Q 7 A Q P R p t ιΗ ...

Page 283: ...gh est ampl itude b Co n n e c t a signal g e n e r a t o r to the fr e q u e n c y d e t e r m i n e d in step a and jer level to 3 0 dBm c Set the 4 9 2 4 9 2 P O p t i o n 4 2 R E F E R E N C E L E V E L to 3 0 dBm and RF A T T E N U A T I O N 0 dB d K e e p i n g the si gnal c e n t e r e d w i th the C E N T E R F R E Q U E N C Y control sw i t c h F R E Q U E N C Y S P A N D I V to 0 the crt...

Page 284: ...R E Q U E N C Y co nt rol of the 49 2 O p t i o n 42 to c e n t e r the signal d i sp lay ed on the 7L14 g Check that the 110 MHz IF O U T ou tp ut powe r is 4 0 dB m 30 For O p t i o n 4 2 in struments Chec k B a n d w i d t h 0 5 MHz C e n t e r F r e q u e n c y 109 5 M H z 1 1 1 5 MHz B a n d p a s s r i p p l e 0 5 dB and S y m m e t r y a b o u t 110 MH 1 0 M H z a C o n n e c t the test e q...

Page 285: ... 1 0 0 on the F r e q u e n c y Counter e W h i l e keep ing the si gn al c e n t e r e d with the C E N T E R F R E Q U E N C Y control set the 4 9 2 O p t i o n 4 2 F R E Q U E N C Y S P A N D I V cont rol to 0 the F r e q u e n c y S p a n D i v on the crt wi ll i n d i c a t e 10 ms f Be t the 7 L 1 4 T i m e D i v for a c a l i b r a t e d d i sp lay and a d j u s t the R e f e r e n c e Leve...

Page 286: ...c t the te st e q u i p m e n t as sh own in Fig 3 55 F ig 3 5 5 Set the i n s t r u m e n t f r o n t p a n e l c o n t r o l s as follows TR 50 2 O u t p u t level d B m 25 Var dB 0 7L14 C e n t e r f r e q u e n c y 0 1 1 0 F r e q s p a n d i v 2 MHz Hz R e s o l u t i o n 3 MHz V e r t i c a l di s p l a y 2 dB R e f e r e n c e L e v e l 0 D i s p l a y A and B off 0 1 S 1 1 us slope a d ju ...

Page 287: ...nter screen 2 Chec k that b a n d w i d t h at the 3 dB p o i n t is 7 5 MHz 1 5 MHz 3 Check that any r i p p l e p r e s e n t on the w a v e f o r m is 0 2 div 4 dB NOTE A sl ig ht c h a n g e in d i sp lay may be ob se rve d when the co ver is r e i n s t a l l e d on the module g Check the C o u p l e d F o r w a r d G a i n IF O U T port P1024 1 Set the 7 L 1 4 S p e c t r u m A n a l y z e r...

Page 288: ...e IF OUT 2 C o n n e c t a 50 ohm t e r m i n a t i o n to the IF OU T P1024 connector 3 C o n n e c t the OUT P1012 c o n n e c t o r to the 7L14 RF Inpu t with a 50 ohm cable 4 A d j u s t the 7 L 1 4 R e f e r e n c e L e ve l until the disp lay ed sign al is ne ar full sc reen 8 divisions 5 Check that the sign al d i s p l a y e d on the 7 L 1 4 in d i c a t e s 2 0 d B m to 2 3 dBm 21 5 dBm 1...

Page 289: ...7 01 the 492 492P Spectrum Analyzer may not meet the flatness specification After replacement of the A12A1 Dual Diode Assembly in First Converter 119 1017 00 the 492 492P Spectrum Analyzer may not meet the flatness or the start spur specification ADD on Page 4 35 after Troubleshooting Aids for the 2182 MHz Phase locked LO First Converter Bias and Start Spur Amplitude After replacement of the A12A1...

Page 290: ...er Sensor must measure 0 dBm 2 MHz Hewlett Packard 8482A 1 Attenuator 13 dB 1 TEKTRONIX 2701 Coaxial Cable 1 Tektronix Part No 50 ohm 1 175 2765 00 Coaxial Cable 1 Tektronix Part No 50 ohm 1 175 2337 00 Coaxial Cable 1 Tektronix Part No 50 ohm 1 175 3310 00 1 Preparation a Remove the First Converter assembly from the spectrum analyzer and connect the cables as shown in Fig 4 23A Connect to ATIO wi...

Page 291: ...ISPLAY B MIN RF ΑΊΤΕΝ PEAK AVERAGE AUTO 30 dBM 5 4 18 GHz band 4 MAX off off O clockwise c Set the DM502 controls as follows Range Switch DB pushbutton Int pushbutton 20 DC Volts out out d Connect the DM502 red test lead to TP1011 on the 1st LO Driver board and the black test lead to the instrument chassis see Fig 4 23B f t Fig 4 23B Adjustments and test points on the 1st LO Driver board Page 3 of...

Page 292: ...ble to the Power Sensor NOTE Calibrate the Power Meter before making measurements c Set front panel controls as follows 2701 SG503 Frequency Range Frequency Variable Output Amplitude Power Meter Line Range O 0 DC 1 2 5 for an indication of 2 00 MHz on the readout Amplitude Multiplier xl counterclockwise on O on the dBm scale d Adjust the SG503 Output Amp control for an indication of O on the Power...

Page 293: ...ency flatness the adjustments on the 1st Converter must be made in conjunction with R1013 bias for bands 1 2 and3 k Alternately adjust R1013 and the adjustments on the 1st Converter see Fig 4 23A until the bandwidth at the 6 dB point matches the bandwidth of the previously displayed 2 MHz signal NOTE It will be necessary to alternate between the above adjustments to decrease the amplitude of the s...

Page 294: ... o c e d u r e Page 3 47 R E P L A C E step 3b and 3c with the following b Apply a 5 kHz 0 to 4 V sign al from the s i n e w a v e generator through a bnc cable to the M A R K E R V I D E O inpu t on the rear panel and connect pin 1 and pin 5 of the A C C E S S O R I E S c o n n e c t o r with a p i n j a c k t o p i n j a c k jumperwire c Adjust Vert Gain R 1 0 6 6 F i g 3 23 for a full sc r e e ...

Page 295: ...the CAL OU T signal to the R F INPUT and ad j u s t RE F L E V E L for an ο π scr een disp lay of a p p r o x i m a t e l y 6 divisions No te the signal amp 1 itud e d Re move the C a l i b r a t o r signal and appl y the outp ut of the sweep o scillator as shown in Fig 3 35 Set the F R E Q U E N C Y to 1 8 GHz and apply a 1 8 GHz signal at 20 dBm from the Sw eep O s c i l l a t o r to the RF INPU...

Page 296: ...n one pin to the left Replace Leveler Disable plug P3035 q Start with R 1061 and adjust the leveling potentiometers s e qu en tially from R1061 through R1013 so the contour of the baseline is an average of the SAVE A display In the process use Horiz adjust R1069 F i g 3 36 to shift the baseline to the right or left so the baseline aligns with the average contour of the SAVE A display r Replace F 2...

Page 297: ...ar waveform 2 Adjust the REF LEVEL so the baseline is near full screen then switch on the 2 d B D IV mode and adjust so the display is m i d screen Fig 3 38A 3 Turn Compensation adjustment R1065 counterclockwise until the display breaks up Fig 3 3 8 B 4 Now turn R1065 clockwise 1 5 to 2 turns past the point the display again becomes a periodic triangular waveform 5 Turn Horiz adjustment R1069 to c...

Page 298: ...ADDRESS 71 signal which is used to clock the steered data bytes into the correct register This continues until seven bytes of data have been clocked into the correct register including the steering byte The third output from U4045 ADDRESS 80 controls transistors Q1058 and Q2017 which enable the write back function In addition to the six steering lines that drive the steering gates U4025 also contr...

Page 299: ...Product 492 Ser 1 Date 2 12 85 Change Ref M55287 Fig 5 28 Basic tune voltage converter Page 2 of 6 ...

Page 300: ...n of R1032 R1053 and R1070 When U2060 is fully on and U2050 s output is at 10V the 10V output level is set by the 2 ma of current in R1052 minus the 1 ma constantly flowing in R1055 Full scale gain is adjusted by R1032 R1052 R1053 and R1055 are TC matched to minimize output voltage drift as a function of temperature Low order DAC U2055 tunes approximately 2 5mV at pin 1 and its gain is adjusted by...

Page 301: ...output as close to OV as possible before switching the circuit back into track mode by turning on Q1065 Comparator U1055 detexts whether U1065 s output is above or below coarse tune ground The instrument microcomputer begins to exercise the low order DAC bits one at a time from MSB to LSB After each bit is turned on U1055 is enabled by turning off Q1058 If U1055 detects that U1065 s output has cro...

Page 302: ...ANODE f c TRANSISTOR DIODE Fig 4 4A Electrode configuration for Surface Mounted Components The positive end of electrolytic capacitors is identified with a band Other capacitors and resistors have no visible identification though their value can be measured with an Ohm Meter or a Capacitance Meter Surface mounted semiconductor devices are statically sensitive and should be treated as outlined in t...

Page 303: ...hould be soldered onto the board with solderpaste rather than solder CAUTION If you use a soldering iron use one with a small tip After applying the solderpaste touch the corner of the pad with the iron to fasten the component Avoid touching the conponent with the hot soldering iron Thermal shock causes hairline cracks that are not visible to the eye NOTE Solderpaste has a shelflife of 3 months wh...

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