Theory of Operation—492/492P Service Vol. 1 (SN B030000 & up)
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C L K
Λ
/
\
/
\
f
Λ _______________ /
IERAL INTERFACE B SELECTED '
n
.
A0-A15
X
X
PERIPHERAL INTERFACE B DESELECTED
D fD 7
----------------------------------------------------DATA VALID
>
<
PB0-7
---------
(
DATA LATCHED ON PIA OUTPUT
I I
I I
\
|
DATA VALID
I
/
DB f7
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I
DATA VALID
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i i --------------i :
DATA — ------ —--------------------------------------------------------------------------------------------------------------- '
-----
VALID
Ι Α I
111
Fig. 5-35. A 6800 write to the instrument bus.
Table 5-25
PARALLEL POLL BYTE
7
6
5
4
3
2
1
0
X
X
X
End-of
sweep
Center
frequency
knob
Phase
lock
X
Front
panel
encoder
After the 6800 reads the status byte, it clears POLL and
writes address 7F on the instrument bus. The transition on
POLL disables the poll response circuitry of boards on the
instrument bus. Since 7F is also an invalid address, it also
unaddresses all instrument bus registers. The following
positive transition on POLL prepares all parallel poll boards,
so when the 6800 writes back the parallel poll byte, it clears
all interrupts that were read.
The 6800 reads the interrupt status of the GPIA on the
GPIB board separately and combines it with the instrument
bus status before servicing the interrupt(s). Interrupts are
serviced according to their priority.
MEMORY BOARD <^>
The Memory board holds the ROM operating program
for the microcomputer and the RAM used by the program. It
also holds a bank of switches that the microcomputer can
read to configure itself for options and diagnostics.
ROM Address Decoding
The full microcomputer address bus extends to this
board for ROM address decoding. U1036 and U1038 de
code banks of addresses and assert one-of-eight ROM
chip-enable lines when a bank that corresponds to one of
the ROJMs is addressed. The decoders are enabled by VMA
and R/W high (a valid address during a read cycle). U1036
also requires A15 to be low to be enabled; if enabled, it
decodes addresses in the range 1800 to 3800 from the bina
ry code formed by A11 through A13.
Since U1038 alone responds to the upper-half of address
space, it need not decode addresses further than A13
through. A15. The four ROMs in this address space, howev-
REV AUG 1981
5-87
