Theory of Operation—492/492P Service Vol. 1 (SN B030000 & up)
signal voltage increases, more current flows through
CR4015, to increase the reverse bias of CR4012. This
sharply reduces the stage gain to unity. The signal current
then flows only in R4010B, R4015, and R4010D. This
change takes place during the positive-going portion of each
cycle. The opposite occurs during the negative-going por
tion of the signal above the minimum input level. As the
input signal increases beyond the point at which the gain of
the final stage decreases to unity, the same sequence oc
curs in the preceding stage, Q3030/Q1025, and so on in
succession, back to the first stage, Q3100/Q1095.
Signal levels above this point activate the second tier of
gain reduction in the first three stages. Each stage incorpo
rates a second set of diodes that reduces the gain by an
other 7 dB. In the first tier of gain reduction, reduction
started at the last stage and proceeded to the first; in the
second tier, the reduction starts at the first stage and pro
ceeds to the third.
In the first stage, diodes CR3089 and CR2087, are for
ward biased when the stage is in the unity gain mode. Limit
ing occurs in the same manner as described above with a
further increase in input signal level, and results in less than
unity gain through the stage (approximately 1/3). The one,
two, three reduction sequence is established by the values
of pull-down resistors R3082, R2076, and R2066.
Detector Circuit
The Detector circuit detects and filters the Log Amplifier
circuit output signal and produces the VIDEO signal that is
transmitted to the Video Amplifier circuits. The circuit con
sists of an operational amplifier with a diode detector in the
feedback path and a low-pass filter at the output.
Actually, the circuit called an operational amplifier is not
easily recognized as such. It is made up of grounded emitter
amplifier Q4025 and a differential amplifier consisting of
Q4030 and Q4035. The summing node for the negative in
put is the base of Q4025 (the positive input is at the ground
ed emitter of Q4025). Also, the differential amplifier is
designed for high impedance output to allow the current that
is available from Q4025 to drive the operational amplifier
very rapidly during the period when both detector diodes
(CR5033 and CR5027) are effectively open circuited; that is,
when the output is near 0 volt. When neither diode is con
ducting, it is necessary that the output change rapidly
through that zone. Note that the network consisting of re
sistors R5032, R5029, R5020, and capacitor C5029 is in
cluded to stabilize the dc operating point.
Figure 5-12 shows a simplified schematic diagram of the
detector circuit. As shown in this diagram, two detector di
odes (CR5033 and CR5027) are used, but only the positive
half cycle is taken as the output (from CR5027). The output
from the collector of transistor Q4035 is applied to the di
odes through capacitor C5035. Ac coupling is used on both
sides of the detector to prevent temperature coefficient ef
fects of the operational amplifier from affecting the detector
output. This isolation provides that the detector charges
and discharges capacitors C5035 and C5024 by the current
induced in each half cycle of the signal without changing
voltage level.
This detector operates as an area (average) detector de
spite the fact that the Log Amplifier circuits operate on peak
principles. It is possible to use an average detector because
of some very selective tailoring in the Log Amplifier circuits.
For instance, resistor example R5021 in the final log amplifi
er stage is sized to reduce the amount of current standing in
the final stage output diodes, thus tapering the curve very
slightly to improve linearity at the lower end of the curve.
Log Gain adjustment R4020, in the final amplifier stage, is
adjusted for increased linearity at the top of the curve.
As shown in the diagram, the positive-going output sig
nal, from the detector, is applied through a low-pass filter
consisting of capacitors C7024, C7014, C7021, C7011, and
inductors L6011, L8021, to the Video Amplifier.
<§>
DISPLAY SECTION
FUNCTIONAL DESCRIPTION
The display section performs several functions:
1) it accepts the VIDEO signal from the IF section, and pro
cesses the signal, and provides the vertical crt plate drive
signals;
2) it processes the sweep voltages from the sweep section
and produces the horizontal crt plate drive voltage. (If Op
tion 02, Digital Storage is included in the instrument, vertical
and horizontal signals are further processed by that circuit
group;)
3) it accepts character information from the instrument data
bus and generates crt plate drive signals to display alpha
and numeric characters;
4) it accepts control levels from front panel beam controls
and generates unblanking signals to control display pres
ence, brightness, and focus.
Video signals from the IF section are applied to the Video
Amplifier. In the logarithmic mode, the signal is amplified
REV AUG 1981
5-31
