Stober POSIDRIVE MDS 5000, Manual

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Standard blocks
Block descriptions
ID 441692.01
STÖBER ANTRIEBSTECHNIK
426
100446 Call PLL
Description
The block implements a PLL control which allows the cycle time of the inverter to be
adjusted to an external source (e.g., fieldbus).
The block evaluates two timestamps:
- The timestamp of the system which is to be used for synchronization is connected to
TstSrc . The external system can be the fieldbus, for example, which generates a
timestamp when a telegram was received.
- The timestamp on
TstRef is usually generated by the inverter at a certain time. An
example is the generation of the timestamp of the inverter 200 µs before the arrival of
the fieldbus telegram.
The PLL adjusts the internal timing cycle of the inverter so that the timestamps on both
inputs are the same. In our example, this would mean that the telegrams always arrive
just before they are processed.
The block is initialized or disabled with the input
En .
The input CycTime gives the block the cycle time with which the timestamp signals are
specified on TstSrc and TstRef .
The PLL is set with the parameters G92 PLL gain, G93 PLL low pass and G94 PLL
maximum correction.
The status of the PLL is indicated on the output
State and in the parameter G95 PLL
status. Parameter G96 PLL measured cycle-time indicates the cycle time of the
timestamp on TstSrc measured by the inverter . The parameter G97 PLL cycle-
correction shows which cycle correction was made by the PLL.
The block brings along the parameters.
Inputs
No. Name Datatype Scaling Description
1 TstSrc U16 1LSB = 1us Timestamp for the synchronization (e.g., fieldbus)
2 TstRef U16 1LSB = 1us
Reference timestamp from the inverter with which the PLL specifies
the target phase.
3 CycTime I16 1LSB = 1us
Cycle time with which the timestamp is specified on TstSrc and
TstRef .
4 En B – Initialization of the PLL
Outputs
No. Name Datatype Scaling Description
5 State U8 –
Status byte
Bit
0:
1 when PLL is latched in
1: 1 when the PLL has extended the cycle time
2: 1 when more than half the control range is utilized
3: 1 when control is at the limits of the control range
(maximum timing correction)
4: 1 when the cycle time is greater than that specified
5: 1 when init is not zero
6..7: Reserved