Oki ML63611, User Manual

Page: 212 / 271

ML63611 User’s Manual
Chapter 15 Power Supply Circuit (POWER)
15 – 8
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
15.3.6 Operation of the OPTION C Power Supply Circuit
The output voltage (1/2 V
DD
) of the halver circuit is supplied to the different voltage regulator circuits (V/R1 and
V/R2) of the OPTION C. The output voltages of the voltage regulator circuits are used as the internal logic
power supply (V
CH
) and the power supply voltage (V
XT
) for the low-speed generator circuit. Further, the battery
voltage is connected directly to the power supply of the high-speed clock generator circuit.
The software setting should be made so that the output voltage of the halver circuit is supplied to the different
voltage regulator circuits during normal load, and the battery voltage is supplied directly to the different voltage
regulator circuits during heavy load.
During normal load (V
DD
= 2.4 to 3.6 V), use the halver circuit by setting VH (bit 0 of VHCON) to “1”, and
during heavy load (V
DD
= less than 2.4 V), disable the halver circuit by setting VH to “0”. When the halver
circuit is not being used, the battery voltage will be supplied directly to the different voltage regulator circuits.
By setting the judgment threshold voltage to 2.4 V using the BLD function, it is possible to detect the battery
voltage during heavy load.
The output voltage of the voltage regulator V/R1 is supplied as the power supply (V
CH
) for the internal logic
circuits during low-speed clock operation. Further, during high-speed clock operation, it is possible to directly
connect the battery voltage in the hardware to the power supply by setting ENOSC (bit 1 of FCON) to “1”.
The output voltage of the voltage regulator circuit V/R2 is always supplied as the power supply voltage (V
XT
) for
the low-speed clock generator circuit.