ML63611 User’s Manual
Chapter 1 Overview
1 – 23
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
1.8.3 Interrupt Basic Timing
Figure 1-9 shows the basic interrupt timing.
As shown in the figure, when an interrupt factor is generated, the interrupt factor is sampled at the falling edge of
CLK and an interrupt request (IRQ) is set at the first half of S1.
When an interrupt condition is established and the CPU receives an interrupt, the interrupt routine will start
beginning from the next machine cycle.
Figure 1-9 Interrupt Basic Timing
M1
M1
CLK
Interrupt factor
S1
S2
S1
S2
S1
S2
IRQ
Process
Main routine
PC
1st interrupt address
Interrupt routine
Summary of Contents for ML63611
Page 9: ...Chapter 1 Overview...
Page 33: ...Chapter 2 CPU and Memory Spaces...
Page 42: ...Chapter 3 CPU Control Functions...
Page 49: ...Chapter 4 Interrupt INT...
Page 62: ...Chapter 5 Clock Generator Circuit OSC...
Page 71: ...Chapter 6 Time Base Counter TBC...
Page 75: ...Chapter 7 Timers TIMER...
Page 99: ...Chapter 8 100 Hz Timer Counter 100HzTC...
Page 103: ...Chapter 9 Watchdog Timer WDT...
Page 108: ...Chapter 10 Ports INPUT I O PORT...
Page 140: ...Chapter 11 Melody Driver MELODY...
Page 152: ...Chapter 12 Serial Port SIO...
Page 179: ...Chapter 13 LCD Driver LCD...
Page 200: ...Chapter 14 Battery Low Detect Circuit BLD...
Page 204: ...Chapter 15 Power Supply Circuit POWER...
Page 215: ...Chapter 16 A D Converter ADC...
Page 238: ...Appendixes...