Oki ML63611, User Manual

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ML63611 User’s Manual
Chapter 3 CPU Control Functions
3 – 6
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
3.3.3 Melody Data Interrupt and Halt Mode Release
The halt mode is not released by a melody data interrupt.
The melody data interrupt is different from a conventional interrupt in that the melody data interrupt is a hardware
processing interrupt used for transfer of melody data to the melody circuit. It is not dependent on the program.
When this interrupt is generated, the instruction immediately after the HALT instruction is executed, then the
melody data is transferred to the melody circuit, and the HALT instruction is executed again. This sequence is
indicated in Figure 3-7.
Figure 3-7 Melody Data Request Interrupt Operation
3.3.4 Note Concerning HALT Instruction
As described above, the instruction immediately after the HALT instruction may be executed any number of times.
For this reason, always place an NOP instruction immediately after the HALT instruction.
(Example)
•
•
•
HALT
NOP
•
•
•
S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S2 S2 S2
HALT
HLT (halt flag)
Melody data
request
PC flow in main
routine
: HALT instruction address
: Melody data address
HALT
(melody)
System Clock
n+1 n+1
n
(melody)
HALT
instruction
execution
Execution of
instruction
immediately after
HALT instruction
HALT
instruction
execution
Melody
data
transter
Halt mode Halt mode
n n