Oki ML63611, User Manual

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ML63611 User’s Manual
Chapter 6 Time Base Counter (TBC)
6 – 2
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
6.3 Time Base Counter Registers
Time base counter register 0 (TBCR0), time base counter register 1 (TBCR1)
These 4-bit special function registers (SFRs) are used to read the 1 to 8 Hz and 16 to 128 Hz outputs of the time
base counter.
A write operation to TBCR0 sets both the 1 to 8 Hz and 16 to 128 Hz outputs to “0”, and a write operation to
TBCR1 sets the 1 to 8 Hz output to “0”.
6.4 Time Base Counter Operation
After system reset the time base counter (TBC) begins to count up from 0000H. The count is incremented at the
falling edge of the TBCCLK.
TBC 32 Hz/16 Hz/4 Hz/2 Hz outputs are used as time base interrupts. At each output falling edge, four bits of
interrupt request register 4 (IRQ4) are set to “1”, namely bit 3 (Q32Hz), bit 2 (Q16Hz), bit 1 (Q4Hz) and bit 0
(Q2Hz), requesting an interrupt to the CPU. TBC outputs are also used as clocks for various circuits.
TBC 1 to 8 Hz output and 16 to 128 Hz output can be read through the time base counter register 0/1
(TBCR0/TBCR1).
A write operation to TBCR1 sets the 1 to 8 Hz output counter to “0”, and a write operation to TBCR0 sets both
the 1 to 8 Hz and 16 to 128 Hz output counters to “0”. The write data in these write operations has no significance.
For example, the “MOV TBCR0, A” instruction can be used to write, but is not dependent on accumulator content
in any way. When write is executed to TBCR0 and TBCR1 and the 1 to 8 Hz and 16 to 128 Hz counters reset,
interrupt requests are generated if 32 Hz/16 Hz/4 Hz/2 Hz outputs have been set to “1”. To disable these interrupts,
first set the master interrupt enable flag (MIE) or interrupt enable register 4 (IE4) to “0”, execute the write
operation to TBCR 0/1, and set the interrupt request flag 4 (IRQ4) to “0”.
Figure 6-2 shows interrupt generation timing and time base counter output reset timing by writing “1” to TBCR0
and TBCR1.
16 Hz 32 Hz 64 Hz 128 Hz
TBCR0 (060H)
(R/W)
bit 3 bit 2 bit 1 bit 0
1 Hz 2 Hz 4 Hz 8 Hz
TBCR1 (061H)
(R/W)
bit 3 bit 2 bit 1 bit 0