Oki ML63611, User Manual

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ML63611 User’s Manual
Chapter 10 Ports (INPUT, I/O PORT)
10 – 28
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
10.7.2 Port E Registers
(1) Port E data register (PED)
PED is a 4-bit special function register used to set the output values for port E.
When a bit in the port E direction register (PEDIR) is set to “1” to select the output mode, the content of the
corresponding bit in the port E data register is output to the port E.
When a bit in the port E data register is read with the corresponding PEDIR bit set to output, the value of the
bit in the port E data register is read.
When a bit in the port E data register is read with the corresponding PEDIR bit set to “0” (input mode), the
level of the corresponding pin of port E is read.
At system reset all bits in the port E data register (PED) are reset to “0”. When data is written to the port E
data register, the pin change timing is at the rising edge of the system clock for state 2 of the write
instruction.
Figure 10-15 indicates port E change timing.
Figure 10-15 Port E Change Timing
(2) Port E direction register (PEDIR)
PEDIR is a 4-bit special function register (SFR) which specifies the port input/output direction for each bit.
Pins corresponding to PEDIR bits set to “0” are input, and those corresponding to PEDIR bits set to “1” are
output.
At system reset all bits in the port E direction register are set to “0”, and port E is initialized to input mode.
S1
S2
Old data New data
CLK
Port E
Write instruction
PE3 PE2 PE1 PE0
PED (00EH)
(R/W)
bit 3 bit 2 bit 1 bit 0
Port E output data
PE3DIR PE2DIR PE1DIR PE0DIR
PEDIR (03FH)
(R/W)
bit 3 bit 2 bit 1 bit 0
Port E input/output setting
0: Input (initial value)
1: Output