ML63611 User’s Manual
Chapter 10 Ports (INPUT, I/O PORT)
10 – 2
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
10.3
Port 0 (P0.0–P0.3)
The ML63611 has Port 0, a 4-bit input-only port.
Apart from the input port function, Port 0 has the functions of external interrupts and the function of transfer to
system reset due to simultaneous key depression.
10.3.1 Port 0 Configuration
For the input port functions, there are the input modes of input with pull-up resistor, input with pull-down resistor,
and high impedance, which can be selected by the Port 0 control registers 0/1 (P0CON0 and P0CON1). Among
the external interrupt functions, the external 5 interrupt function has been assigned to this port which detects the
OR result of the four input bits. It is possible to set the interrupt enabling and disabling for each bit using the Port
0 interrupt enable register (P0IE).
The function of transfer to system reset due to simultaneous key depression is the function of transferring to the
system reset mode when there is simultaneous key depression of 2 bits, 3 bits, or 4 bits, as specified by the mask
option, for a period of more than about 2 to 3 seconds. For details, see Section 3.2, “System Reset Mode (RST)”.
Figure 10-1 shows the configuration of port 0.
Figure 10-1 Input-Only Port (Port 0) Configuration
10.3.2 Port 0 Registers
The following registers are used to control port 0:
(1)
Port 0 data register (P0D)
(2)
Port 0 control registers 0/1 (P0CON0, P0CON1)
(3)
Port 0 interrupt enable register (P0IE)
(1) Port 0 data register (P0D)
P0D is a 4-bit read-only special function register (SFR) used to read the pin level of each bit of port 0.
Pull-up/
pull-down
control
P0CON0
P0CON1
4
4
V
DD
4
V
SS
Read P0D
4
4
P0.0–P0.3
(to external interrupt 5
control circuit)
Data bus
P0.0–P0.3
P03
P02
P01
P00
P0D (000H)
(R)
bit 3
bit 2
bit 1
bit 0
Pin level of each bit of port 0
0: “L” level (initial value)
1: “H” level
Summary of Contents for ML63611
Page 9: ...Chapter 1 Overview...
Page 33: ...Chapter 2 CPU and Memory Spaces...
Page 42: ...Chapter 3 CPU Control Functions...
Page 49: ...Chapter 4 Interrupt INT...
Page 62: ...Chapter 5 Clock Generator Circuit OSC...
Page 71: ...Chapter 6 Time Base Counter TBC...
Page 75: ...Chapter 7 Timers TIMER...
Page 99: ...Chapter 8 100 Hz Timer Counter 100HzTC...
Page 103: ...Chapter 9 Watchdog Timer WDT...
Page 108: ...Chapter 10 Ports INPUT I O PORT...
Page 140: ...Chapter 11 Melody Driver MELODY...
Page 152: ...Chapter 12 Serial Port SIO...
Page 179: ...Chapter 13 LCD Driver LCD...
Page 200: ...Chapter 14 Battery Low Detect Circuit BLD...
Page 204: ...Chapter 15 Power Supply Circuit POWER...
Page 215: ...Chapter 16 A D Converter ADC...
Page 238: ...Appendixes...