Oki ML63611, User Manual

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ML63611 User’s Manual
Chapter 16 A/D Converter (ADC)
16 – 3
OPTION B (D): 1.5 V (3.0 V), With regulator
circuit for LCD bias
OPTION A (C): 1.5 V (3.0 V), Without regulator
circuit for LCD bias
16.3 Operation of A/D Converter
As shown in Figure 16-1, the RC oscillation circuit can be made by connecting resistors and capacitors to each
pin.
Counter A (CNTA0 to 4) is a 4.8-digit decade counter (1/(10
4
×
8)) to count the system clock (CLK) which is the
time reference and can count up to a maximum of 79,999.
Counter B (CNTB0 to 3) is a 14-stage binary counter to count the oscillation clock (OSCCLK) of the RC
oscillation circuit and can count up to a maximum of 16,383.
Both Counter A and Counter B have the overflow flags (OVFA and OVFB) and overflow output generates the
A/D converter interrupt request (ADINT). ADINT due to overflow of either Counter A or Counter B is selected
by Bit 1 (SADI) of the A/D converter control register 0 (ADCON0). By resetting SADI to “0”, overflow of
Counter A is selected and by setting SADI to “1”, overflow of Counter B is selected. The vector address of
ADINT is at address 02FH.
Bit 0 (EADC) of ADCON0 is a bit to select operation/halt of the A/D conversion. By resetting EADC to “0”, the
RC oscillation is halted and no counting is performed. By setting EADC to “1”, the RC oscillation is begun and
counting of the RC oscillation clock and the system clock is started.
Bit 2 (STV) is used for setting the internal power supply voltage (V
CH
) as the power supply voltage in order to
enable the operation of Counter A and Counter B. However, carry out the setting of this bit only after setting the
halver circuit to “disabled”.
Set EADC to “1” after waiting for about 120
µ
s (2 clock periods of the low-speed clock) after setting STV to “1”.
Note that Counter A is likely to operate improperly if the RC oscillator circuit is made to operate when the
internal power supply has not become stable.
Various oscillation mode of the RC oscillation part is performed by the A/D converter control register 1
(ADCON1). The RC oscillation clock can be monitored by outputting to PE.0 in secondary function.