CHAPTER 5 CLOCK GENERATOR
Preliminary User’s Manual U16846EJ1V0UD
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Table 5-3. Relationship Between Operation Clocks in Each Operation Status
Ring-OSC Oscillator
Prescaler Clock Supplied to
Peripherals
Note 2
Status
Operation
Mode
High-Speed
System Clock
Oscillator
Note 1
RSTOP = 0
RSTOP = 1
CPU Clock
After
Release
MCM0 = 0
MCM0 = 1
Reset Stopped
Ring-OSC
Stopped
STOP
Stopped
Note 3
Stopped
HALT Oscillating
Oscillating Oscillating Stopped
Note 4
Ring-OSC
High-speed
system clock
Notes 1. When “Cannot be stopped” is selected for Ring-OSC by the option byte.
2. When “Can be stopped by software” is selected for Ring-OSC by the option byte.
3. Operates using the CPU clock at STOP instruction execution.
4. Operates using the CPU clock at HALT instruction execution.
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for Ring-OSC by the
option byte.
Remark RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
MCM0:
Bit 0 of the main clock mode register (MCM)
Table 5-4. Oscillation Control Flags and Clock Oscillation Status
High-Speed System Clock Oscillator
Ring-OSC Oscillator
RSTOP = 0
Stopped
Oscillating
MSTOP = 1
RSTOP = 1
Setting prohibited
RSTOP = 0
Oscillating
MSTOP = 0
RSTOP = 1
Oscillating
Stopped
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for Ring-OSC
by the option byte.
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
