CHAPTER 5 CLOCK GENERATOR
Preliminary User’s Manual U16846EJ1V0UD
95
5.4.2 Ring-OSC oscillator
A Ring-OSC oscillator is incorporated in the 78K0/KB1+.
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. The Ring-OSC clock
always oscillates after RESET release (240 kHz (TYP.)).
5.4.3 Prescaler
The prescaler generates various clocks by dividing the high-speed system clock oscillator output when the high-
speed system clock is selected as the clock to be supplied to the CPU.
Caution When the Ring-OSC clock is selected as the clock supplied to the CPU, the prescaler generates
various clocks by dividing the Ring-OSC oscillator output (f
X
= 240 kHz (TYP.)).
5.5 Clock Generator Operation
The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode.
•
High-speed system clock f
XP
•
Ring-OSC clock f
R
•
CPU clock f
CPU
•
Clock to peripheral hardware
The CPU starts operation when the on-chip Ring-OSC oscillator starts outputting after reset release in the
78K0/KB1+, thus enabling the following.
(1) Enhancement of security function
When the high-speed system clock is set as the CPU clock by the default setting, the device cannot operate if the
high-speed system clock is damaged or badly connected and therefore does not operate after reset is released.
However, the start clock of the CPU is the on-chip Ring-OSC clock, so the device can be started by the Ring-
OSC clock after reset release by the clock monitor (detection of high-speed system clock stop). Consequently,
the system can be safely shut down by performing a minimum operation, such as acknowledging a reset source
by software or performing safety processing when there is a malfunction.
