CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U16846EJ1V0UD
62
3.4.8 Based indexed addressing
[Function]
The B or C register contents specified in an instruction word are added to the contents of the base register, that
is, the HL register pair in the register bank specified by the register bank select flag (RBS0 and RBS1), and the
sum is used to address the memory. Addition is performed by expanding the B or C register contents as a
positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried out for all the
memory spaces.
[Operand format]
Identifier Description
−
[HL + B], [HL + C]
[Description example]
In the case of MOV A, [HL + B] (selecting B register)
Operation code
1
0
1
0
1
0
1
1
[Illustration]
16
0
H
7
8
L
0
7
B
+
0
7
7 0
A
HL
The contents of the memory
addressed are transferred.
Memory
