NEC 78K0/KB1+, Preliminary User'S Manual

Page: 49 / 405

CHAPTER 3 CPU ARCHITECTURE
Preliminary User’s Manual U16846EJ1V0UD
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Table 3-5. Special Function Register List (1/3)
Manipulatable Bit Unit Address Special Function Register (SFR) Name Symbol R/W
1 Bit 8 Bits 16 Bits
After
Reset
FF00H Port register 0 P0 R/W
√ √ −
00H
FF01H Port register 1 P1 R/W
√ √ −
00H
FF02H Port register 2 P2 R
√ √ −
Undefined
FF03H Port register 3 P3 R/W
√ √ −
00H
FF08H
FF09H
A/D conversion result register ADCR R
− − √
Undefined
FF0AH Receive buffer register 6 RXB6 R
− √ −
FFH
FF0BH Transmit buffer register 6 TXB6 R/W
− √ −
FFH
FF0CH Port register 12 P12 R/W
√ √ −
00H
FF0DH Port register 13 P13 R/W
√ √ −
00H
FF0FH Serial I/O shift register 10 SIO10 R
− √ −
00H
FF10H
FF11H
16-bit timer counter 00 TM00 R
− − √
0000H
FF12H
FF13H
16-bit timer capture/compare register 000 CR000 R/W
− − √
0000H
FF14H
FF15H
16-bit timer capture/compare register 010 CR010 R/W
− − √
0000H
FF16H 8-bit timer counter 50 TM50 R
− √ −
00H
FF17H 8-bit timer compare register 50 CR50 R/W
− √ −
00H
FF18H 8-bit timer H compare register 00 CMP00 R/W
− √ −
00H
FF19H 8-bit timer H compare register 10 CMP10 R/W
− √ −
00H
FF1AH 8-bit timer H compare register 01 CMP01 R/W
− √ −
00H
FF1BH 8-bit timer H compare register 11 CMP11 R/W
− √ −
00H
FF20H Port mode register 0 PM0 R/W
√ √ −
FFH
FF21H Port mode register 1 PM1 R/W
√ √ −
FFH
FF23H Port mode register 3 PM3 R/W
√ √ −
FFH
FF28H A/D converter mode register ADM R/W
√ √ −
00H
FF29H Analog input channel specification register ADS R/W
√ √ −
00H
FF2AH Power-fail comparison mode register PFM R/W
√ √ −
00H
FF2BH Power-fail comparison threshold register PFT R/W
− √ −
00H
FF2CH Port mode register 12 PM12 R/W
√ √ −
FFH
FF30H Pull-up resistor option register 0 PU0 R/W
√ √ −
00H
FF31H Pull-up resistor option register 1 PU1 R/W
√ √ −
00H
FF33H Pull-up resistor option register 3 PU3 R/W
√ √ −
00H
FF3CH Pull-up resistor option register 12 PU12 R/W
√ √ −
00H
FF48H External interrupt rising edge enable register EGP R/W
√ √ −
00H
FF49H External interrupt falling edge enable register EGN R/W
√ √ −
00H
FF4FH Input switch control register ISC R/W
√ √ −
00H