CHAPTER 5 CLOCK GENERATOR
Preliminary User’s Manual U16846EJ1V0UD
85
The fastest instruction can be executed in 2 clocks of the CPU clock in the 78K0/KB1+. Therefore, the
relationship between the CPU clock (f
CPU
) and minimum instruction execution time is as shown in the Table 5-2.
Table 5-2. Relationship Between CPU Clock and Minimum Instruction Execution Time
Minimum Instruction Execution Time: 2/f
CPU
High-Speed System Clock
Ring-OSC Clock
CPU Clock (f
CPU
)
Note 1
At 10 MHz Operation
Note 2
At 16 MHz Operation
Note 2
At 240 kHz (TYP.) Operation
f
X
0.2
µ
s 0.125
µ
s 8.3
µ
s (TYP.)
f
X
/2 0.4
µ
s 0.25
µ
s 16.6
µ
s (TYP.)
f
X
/2
2
0.8
µ
s 0.5
µ
s Setting
prohibited
f
X
/2
3
1.6
µ
s 1.0
µ
s Setting
prohibited
f
X
/2
4
3.2
µ
s 2.0
µ
s Setting
prohibited
Notes 1. The main clock mode register (MCM) is used to set the CPU clock (high-speed system clock/Ring-
OSC clock) (see Figure 5-4).
2. When crystal/ceramic oscillation is used
(2) Ring-OSC mode register (RCM)
This register sets the operation mode of Ring-OSC.
This register is valid when “Can be stopped by software” is set for Ring-OSC by the option byte, and the high-
speed system clock is input to the CPU clock. If “Cannot be stopped” is selected for Ring-OSC by the option
byte, settings for this register are invalid.
RCM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Figure 5-3. Format of Ring-OSC Mode Register (RCM)
Address: FFA0H After reset: 00H R/W
Symbol
7 6 5 4 3 2 1
<0>
RCM
0 0 0 0 0 0 0
RSTOP
RSTOP
Ring-OSC
oscillating/stopped
0
Ring-OSC
oscillating
1
Ring-OSC
stopped
Caution Make sure that bit 1 (MCS) of the main clock mode register (MCM) is 1 before setting
RSTOP.
