CHAPTER 13 SERIAL INTERFACE CSI10
Preliminary User’s Manual U16846EJ1V0UD
267
Cautions 1. When the Ring-OSC clock is selected as the clock supplied to the CPU, the clock of the Ring-
OSC oscillator is divided and supplied as the serial clock. At this time, the operation of serial
interface CSI10 is not guaranteed.
2. Do not write to CSIC10 while CSIE10 = 1 (operation enabled).
3. Clear CKP10 to 0 to use P10/SCK10(/TxD0
Note
) as general-purpose port pins.
4. The phase type of the data clock is type 1 after reset.
Note
µ
PD78F0102H and 78F0103H only.
Remarks 1. Figures in parentheses are for operation with f
X
= 10 MHz
2. f
X
: High-speed system clock oscillation frequency
(3) Port mode register 1 (PM1)
This register sets port 1 input/output in 1-bit units.
When using P10/SCK10(/TxD0
Note
) as the clock output pins of the serial interface, and P12/SO10 as the data
output pins, clear PM10, PM12, and the output latches of P10, and P12 to 0.
When using P10/SCK10(/TxD0
Note
) as the clock input pins of the serial interface, and P11/SI10(/RxD0
Note
) as the
data input pins, set PM10 and PM11 to 1. At this time, the output latches of P10 and P11 may be 0 or 1.
PM1 can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to FFH.
Note
µ
PD78F0102H and 78F0103H only.
Figure 13-4. Format of Port Mode Register 1 (PM1)
Address: FF21H After reset: FFH R/W
Symbol
7 6 5 4 3 2 1 0
PM1
PM17 PM16 PM15 PM14 PM13 PM12 PM11 PM10
PM1n
P1n pin I/O mode selection (n = 0 to 7)
0
Output mode (output buffer on)
1
Input mode (output buffer off)
