IBM P 615 series, Service Manual

Page: 276 / 491

Configuring and Deconfiguring Processors or Memory
All failures that crash the system with a machine check or check stop, even if intermittent, are reported as
a diagnostic callout for service repair. To prevent the recurrence of intermittent problems and improve the
availability of the system until a scheduled maintenance window, processors and memory DIMMs with a
failure history are marked
″
bad
″
to prevent their being configured on subsequent boots. This function is
called repeat gard .
A processor or memory DIMM is marked
″
bad
″
under the following circumstances:
v A processor or memory DIMM fails built-in self-test (BIST) or power-on self-test (POST) testing during
boot (as determined by the service processor).
v A processor or memory DIMM causes a machine check or check stop during runtime, and the failure
can be isolated specifically to that processor or memory DIMM (as determined by the processor runtime
diagnostics in the service processor).
v A processor or memory DIMM reaches a threshold of recovered failures that results in a predictive
callout (as determined by the processor run-time diagnostics in the service processor).
During boot time, the service processor does not configure processors or memory DIMMs that are marked
“bad.”
If a processor or memory DIMM is deconfigured, the processor or memory DIMM remains offline for
subsequent reboots until it is replaced or repeat gard is disabled. The repeat gard function also provides
the user with the option of manually deconfiguring a processor or memory DIMM, or re-enabling a
previously deconfigured processor or memory DIMM.
For information about configuring or deconfiguring a processor, see the Processor
Configuration/Deconfiguration Menu on page 239. For information about configuring or deconfiguring a
memory DIMM, see the Memory Configuration/Deconfiguration Menu on page 240. Both of these menus
are submenus under the System Information Menu. You can enable or disable CPU Repeat Gard or
Memory Repeat Gard using the Processor Configuration/Deconfiguration Menu.
Run-Time CPU Deconfiguration (CPU Gard)
L1 instruction cache recoverable errors, L1 data cache correctable errors, and L2 cache correctable errors
are monitored by the processor run-time diagnostics (PRD) firmware running in the service processor.
When a predefined error threshold is met, an error log with warning severity and threshold exceeded
status is returned to AIX. At the same time, PRD marks the CPU for deconfiguration at the next boot. AIX
will attempt to migrate all resources associated with that processor to another processor and then stop the
defective processor.
Service Processor System Monitoring - Surveillance
Surveillance is a function in which the service processor monitors the system, and the system monitors the
service processor. This monitoring is accomplished by periodic samplings called heartbeats .
Surveillance is available during the following phases:
v
System firmware bringup (automatic)
v Operating system run-time (optional)
Note: Operating system surveillance is disabled in partitioned systems.
System Firmware Surveillance
System firmware surveillance is automatically enabled during system power-on. It cannot be disabled by
the user, and the surveillance interval and surveillance delay cannot be changed by the user.
256
Eserver
pSeries 615 Service Guide