GE LOGIQ 5 PRO, Service Manual

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GE M
EDICAL
S
YSTEMS
D
IRECTION
2380207, R
EVISION
7 LOGIQ™5 PRO S
ERVICE
M
ANUAL
5-12 Section 5-4 - Front End
5-4-6 FEC
(cont’d)
• CLK Generator Block:
Generates 40MHz (two phases), and 26.6MHz clock using 160MHz master clock.
• Real Time Controller (RTCL):
The TRIG cyclical Real Time Control is done by SH4 RISC processor. SH4 is a one of MID BUS
agent through SH-PCI bridge.
• PCI - PCI Bridge:
It Bridges between Mid bus and host side PCI bus by using i960RP. Mid bus is basically compliant
to CompactPCI. Primary side PCI is connected to Host PC through PCI cable and PC2IP which is
mounted on PCI slot of PC-motherboard.
• Image Data Transferring:
It receives image data from COMSO, and send them to Host side. Data are buffered when receiving
on COMSO data bus. After buffered, data are stored and handled on Local side of i960. And DMA
function of i960RP perform data transferring to host PC memory.
- Peripheral Control:
The SH4 or i960RP also performs other functions like safety observation, HV Control and so
on.
5-4-7 HV Power (Tx Power)
5-4-7-1 Overview
AC110V is supplied to the HV unit via AC Box > Transformer > SSR. This is applied to the PFC, inside
the HV unit. The PFC convert AC100V to DC400V, and DC voltage is applied to DC/DC, then to HVH,
HVL, and SHV using dropper. They convert DC voltage to proper voltage to be outputted.
5-4-7-2 Specifications
DC Output Capacity:
• HVH : +/- 0V to +/- 60V variable, Max. 110W, Max. 2A
• HVL : +/-0V to +/- 30V variable, Max, 70W, 1A
• +SHV: +80V +/- 5%, 80mA
• -SHV: -80V +/- 5%, 80mA
Figure 5-11 HV Unit Block Diagram
D R O P P E R 1 D R O P P E R 1
PWM 1 PWM 1
(HVH) (HVH)
PWM 1
D R O P P E R 1 D R O P P E R 1
D R O P P E R 2 D R O P P E R 2
PWM 2 PWM 2
(HVL) (HVL)
D R O P P E R 2 D R O P P E R 2
D R O P P E R 3 D R O P P E R 3
PWM 3
(
PWM 3 PWM 3
(SHV) (SHV)
D R O P P E R 3 D R O P P E R 3
+HVH
(0 ~ 60V)
-HVH
(0 ~ -60V)
+HVL
(0 ~ 30V)
-HVL
(0 ~ -30V)
+SHV
(0 ~ 80V)
-SHV
(0 ~ -80V)