AMD Elan SC520, User Manual, Page: 70 / 444

System Initialization
3-14 Élan™SC520 Microcontroller User’s Manual
3.7.4.1 Single Device (an A/D Converter) Using One Chip Select
In this example, an A/D converter has four 16-bit registers that need to be mapped into
I/O space on GPCS5 at I/O address 0500h. As shown in Table 3-2, the value to program
into a PAR register in this case is 34070500h.
3.7.4.2 Single Device That Performs Its Own Decode
In this example, an external memory-mapped 16-color 480 x 320 pixel LCD controller
performs its own address decoding. It needs a 128-Kbyte window mapped at 000C0000h.
A chip select must be used (specified in the ATTR bit field of the PAR register), but it does
not need to be mapped to an external pin. GPCS7 is used here. As shown in Table 3-3,
the value to program into a PAR register in this case is 5E00400Ch.
3.7.4.3 Multiple Devices On One Chip Select
A single PAR register can be programmed for a larger range than is needed by a single
peripheral. For example, consider a bank of 16 memory-mapped A/D converters, each of
which has four 16-bit registers. An external PAL is programmed to do the address decoding
for each individual A/D converter. The converters will be memory-mapped to a range of
00020000–0002003Fh. The PAL generates the chip selects for each of the four converters
by watching for the appropriate memory read and write cycles and is qualified from GPCS2
from the ÉlanSC520 microcontroller. As shown in Table 3-4, the value to program into a
PAR register in this case is 48000020h.
Table 3-2 Example PAR Programming: Single Device Using One Chip Select
Bit Field Value Meaning
Target Device 001b GP bus I/O space
Attribute Field 101b GPCS5
Page Size 0b Clear to 0 (this bit not applicable to I/O space)
Region Size 7h Specifies an 8-byte region size
Start Address 0500h Physical address 0500h
Table 3-3 Example PAR Programming: Single Device That Performs Its Own Decode
Bit Field Value Meaning
Target Device 010b GP bus memory space
Attribute Field 111b GPCS7
Page Size 1b 64-Kbyte granularity
Region Size 1h Specifies two 64-Kbyte pages for a 128-Kbyte region size
Start Address 000Ch Physical address 000C0000h
Table 3-4 Example PAR Programming: Multiple Devices on One Chip Select
Bit Field Value Meaning
Target Device 010b GP bus memory space
Attribute Field 010b GPCS2
Page Size 0b 4-Kbyte granularity
Region Size 0h One 4-Kbyte page
Start Address 20h Physical address 00020000h