AMD Elan SC520, User Manual, Page: 363 / 444

Synchronous Serial Interface
Élan™SC520 Microcontroller User’s Manual 22-3
22.5 OPERATION
Synchronous serial interface describes a port that can be implemented in several ways.
Typically, the microcontroller port is called the
master and one or more peripheral device
ports are slaves.
■
The master port (ÉlanSC520 microcontroller) configures a slave by serial transmission
of slave commands, addresses, and data.
■
A slave (peripheral device) can send requested status information or data, similarly.
Options in the SSI Control (SSICTL) register (MMCR offset CD0h), along with software-
controlled device enable signals, can be used to customize the SSI port to emulate a variety
of formats. Its flexibility allows simple communication with multiple devices, reducing
software overhead.
Three commands are provided to initiate the transfer of data through the SSI. A write to
the SSI Control (SSICTL) register selects the type of cycle to execute and initiates the
cycle. The three SSI commands are:
■ Transmit-only (half-duplex)—In a transmit transaction, or cycle, the contents of the SSI
Transmit (SSIXMIT) register (MMCR offset CD1h) are serially shifted onto the SSI_DO
pin.
■
Receive-only (half-duplex)—A receive transaction shifts a byte from SSI_DI to the SSI
Receive (SSIRCV) register (MMCR offset CD4h).
■
Simultaneously transmit and receive (full-duplex)
The ÉlanSC520 microcontroller SSI is always the master and drives the clock when the
SSI command is given. Slave devices cannot drive this clock. All transactions complete
within eight clock cycles.
22.5.1 Usage Scenarios
22.5.1.1 Four-Pin Interface
A full-duplex, four-pin port has separate input and output data pins. Figure 22-2 is a block
diagram of the SSI connected to multiple four-pin slave devices. A transmit and receive
operation can take place within the same eight clocks, as shown in Figure 22-3. Many four-
pin slave ports, however, operate in half-duplex. In that case, Figure 22-5 would apply.
22.5.1.2 Three-Pin Interface
SSI_DO and SSI_DI can be externally shorted to interface three-pin peripheral devices, as
in Figure 22-4. This creates an I/O signal that matches slave I/O pins. Three-pin ports
multiplex the data output and input for half-duplex communication. A typical half-duplex
operation, as shown in Figure 22-5, is implemented with a two-byte protocol in non-inverted
phase and clock modes. The first byte sends a command/address byte to the slave, which
indicates that the data for the second byte will be transmitted or received. The slave should
begin to transmit or receive when it detects an active clock.