AMD Elan SC520, User Manual, Page: 329 / 444

Élan™SC520 Microcontroller User’s Manual 19-1
CHAPTER
19
WATCHDOG TIMER
19.1 OVERVIEW
The ÉlanSC520 microcontroller includes an integrated watchdog timer (WDT).
Features of the watchdog timer include:
■
Distinct keyed write sequences are required to open the Watchdog Timer Control
(WDTMRCTL) register for reconfiguration and to reset the current count.
■
Supports up to a 30-second time-out period with a 33-MHz CPU clock
■ Programmable to generate either a system reset or an interrupt request (maskable or
non-maskable) on the first time-out. If software has not cleared an indicator bit by the
second time-out, the watchdog timer always generates a system reset instead.
■
The watchdog timer interrupt request can be programmed as maskable or non-
maskable.
■
A status flag for software to detect the watchdog timer’s interrupt request
■ ÉlanSC520 microcontroller input pins that are typically sampled at the initial power-on
reset (i.e., with the PWRGOOD input) are not sampled for a system reset due to a
watchdog timer time-out.
■
The watchdog timer counters are automatically stopped in AMDebug technology mode.
19.2 BLOCK DIAGRAM
Figure 19-1 shows a block diagram of the watchdog timer.