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2-2
IM 701210-05E
2.1 System Configuration/Block Diagram
Block Diagram of the DL750/DL750P
701250(HS10M12)
Acquisition Block Diagram
CPU
CPU Block Diagram
Module Block Diagram
Plug-in Module CH1 - CH16
ACQ Memory
50MW - 1000MW
GIGAZoom
Engine
(ACQ-ASIC)
FDD
Zip
Printer
Controller
PC CARD
SCSI
RS-232
USB
100 BASE-LAN
GP-IB
GP-IB Port
Main Memory
64 MB
SCSI Port
10.4 Color TFT
SVGA 800
×
600
Internal Thermal
Printer (100 mm width)
Internal Thermal
Printer (A4 width)
701251(HS1M16)
701260(HV(with RMS))
701265(TEMP/HPV)
ASIC
16
FLT
AMP
A/D
ATT
16
Isolation Block
FLT
AMP
A/D
ATT
VIDEO OUT(SVGA)
Ethernet
RS-232 Port
USB Port
GO/NO-GO
GO/NO-GO Port
30 GB
HDD
ASIC
12
FLT
AMP
A/D
ATT
12
Isolation Block
FLT
AMP
A/D
ATT
Isolator
Isolation Block
H
L
RJC
AMP
16
A/D
ATT
H
L
RJC
AMP
16
A/D
ATT
ASIC
Isolator
CPU
701261(UNIVERSAL)
701262(UNIVERSAL(AAF))
701270(STRAIN_NDIS)
701271(STRAIN_DSUB)
16
FLT
AMP
AD
Isolation Block
Isolator
DAC
ASIC
Inst.
AMP
16
FLT
AMP
AD
DAC
Inst.
AMP
Bridge
Power
Bridge
Power
+
-
+
-
+
-
+
-
POD-A
POD-B
High speed
Logic Probe
Isolated
Logic Probe
Ext. Clk In
Ext. trig In/out
DSP
Channel
1 - 6
Voice-Memo
Earphone Microphone
Port
701280(FREQ)
701275(ACCL/VOLT)
ASIC
16
FLT
AMP
AD
ATT
16
Isolation Block
FLT
AMP
AD
ATT
Current source
Current source
ASIC
FLT
AMP
ATT
Isolation Block
FLT
AMP
ATT
CPU
ASIC
COMP
COMP
Isolator
Isolator
701255(NONISO_10M12)
ASIC
12
FLT
AMP
A/D
ATT
12
FLT
AMP
A/D
ATT
Isolator
ASIC
16
FLT
AMP
A/D
16
Isolation Block
Isolator
H
RJC
H
L
RJC
ATT
L
FLT
AMP
A/D
ATT
Graphic
Controller
Signal Flow on the DL750/DL750P
The flow of the signal applied to the input signal varies depending on the module. Here, the High-Speed 10 MS/s,
12-Bit Isolation Module (HS10M12(701250)) is used as an example for the explanation. (For details on the flow of
the signal of each module, see the block diagram.)
The signal applied to the two input terminals is first processed by the input section of each module.
On the HS10M12(701250), the input signal is attenuated/amplified by the attenuator and amplifier and its
bandwidth is limited using the filter. The signal is then A/D converted, passed through the isolator and ASIC, and
output to the main unit.
At the A/D converter, the input signal is sampled at a sample rate of 10 MS/s (10 million times per second) and
converted to digital data.
The 16 channels of digital data collected at the CPU board pass through the GIGAZoom Engine (ACQ-ASIC) and
stored in the ACQ Memory. The digital data stored in the ACQ Memory is compressed at high speeds by the
GIGAZoom Engine (ACQ-ASIC), passed through the Graphic controller, and displayed on the SVGA TFT color display.
The DSP channel (optional) performs realtime computation between arbitrary channels using the A/D conversion data of
an analog input channel (or the computed result of a DSP channel) as a computation source. Using DSP channels, the
DL750/DL750P can acquire waveforms of up to 16 ch 6 DSP ch 16-bit digital data, simultaneously.
701210(DL750)
701230(DL750P)
Printer
Controller
CPU