3152A User Manual
Using The Instrument 3-38
Racal Instruments
©
2001
The Control Bits
There are four control bits that must be loaded within a group of
two words, they are the PLL, trigger phase offset, SYNC and
stop bits.
The control bits are located as shown in the figure. Note that the
odd-even order of these bits is critical.
The bits are described below:
PLL Bit –
This bit is a don’t care unless the 3152A will be used
in PLL mode to lock to an external analog (or digital) signal.
This bit represents the phase shift of the waveform with respect
to the input trigger point. Exactly one PLL bit may be set per
waveform segment for proper operation of the PLL mode of the
3152A.
Trigger Phase Offset Bit –
The trigger phase offset bit
determines the offset point in the waveform where the
waveform starts after receiving a trigger signal. Like the PLL bit,
Trigger phase offset bits can be placed in one location only.
SYNC Bit –
The SYNC bit determines the offset point on the
waveform where the 3152A outputs a SYNC signal. The SYNC
signal width is always 2 sample clock cycles wide per SYNC bit
set. Multiple SYNC bits can be placed at any location along the
length of the programmed waveform segment to create complex
sync signals.
Stop Bit –
The Stop bit determines the end point of the
waveform. Stop bits can be placed in one location only for
typical. If you place multiple stop bits, the waveform will stop at
the first stop bit encountered. The waveform will actually stop at
the waveform point after the one with the stop bit set.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
X
D1
D0
WAVEFORM POINT DATA
PLL BIT
EVEN WAVEFORM POINT
(FLOOR(POS/2)*2)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
X
X
X
WAVEFORM POINT DATA
SYNC BIT
ODD WAVEFORM POINT
(FLOOR(POS/2)*2+1)
STOP BIT
PHASE BIT
D2
D2
D1
D0
Figure 3-3
(Repeated)
, 16-Bit Waveform Data Format
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