3152A User Manual
Racal Instruments
©
2001
SCPI and HS Command Reference 4-27
Standard Event
Status Register
(ESR)
The Standard Event Status Register reports status for special
applications. The 8 bits of the ESR have been defined by the
IEEE-STD-488.2 as specific conditions which can be monitored
and reported back to the user upon request. The Standard
Event Status Register is destructively read with the *ESR?
common query. The Standard Event Status Register is cleared
with a *CLS common command, with a power-on and when
read by *ESR?.
The arrangement of the various bits within the register is firm
and is required by all GPIB instruments that implement the
IEEE-STD-488.2. Description of the various bits is given in the
following:
Bit 0
- Operation Complete. Generated in response to the *OPC
command. It indicates that the device has completed all
selected and pending operations and is ready for a new
command.
Bit 1
- Request Control. This bit operation is disabled on the
Model 3152A.
Bit 2
- Query Error. This bit indicates that an attempt is being
made to read data from the output queue when no output is
either present or pending.
Bit 3
- Device Dependent Error. This bit is set when an error in
a device function occurs. For example, the following command
will cause a DDE error:
VOLTage 7.25;:VOLTage:OFFSet 4.1
Both of the above parameters are legal and within the specified
limits, however, the synthesizer is unable to generate such an
amplitude and offset combination.
Bit 4
- Execution Error. This bit is generated if the parameter
following the command is outside of the legal input range of the
synthesizer.
Bit 5
- Command Error. This bit indicates the synthesizer
received a command that was a syntax error or a command that
the device does not implement.
Bit 6
- User Request. This event bit indicates that one of a set
of local controls had been activated. This event bit occurs
regardless of the remote or local state of the device.
Bit 7
- Power On. This bit indicates that the device's power
source was cycled since the last time the register was read.
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