3152A User Manual
3152A Specifications A-4
Racal Instruments
©
2001
Trigger Sources
Trigger functionality is optionally to:
(1)
cause one complete cycle of the selected waveform to
be
output.
(2)
gate the waveform output while the trigger signal is
asserted.
Software
IEEE-STD-488.2 *TRG, VXI Word
Serial
trigger
Internal Internal
programmable
rate
generator
System Delay
From External Trigger input to
Waveform Output
Standard Waveforms
120ns + 2 sample clock periods ± 1
sample
clock
period
Arbitrary Waveforms
150ns + 2 sample clock periods ± 1
sample
clock
period
External Input from:
1)
Front panel BNC, TTL compatible, positive slope
2)
TTLTRG0-7, Synchronous Protocol, negative slope,
VXIbus TTLTRG trigger acceptor requirements:
Minimum pulse width (logic low - asserted) : 20 ns,
Minimum pulse width (logic high - unasserted) : 20 ns,
External Output to:
TTLTRG0-7, Synchronous Protocol, negative slope,
VXIbus TTLTRG trigger source requirements:
Minimum pulse width (logic low - asserted) : 30 ns
Minimum pulse width (logic high - unasserted) : 80ns
Maximum Clock Frequency : 50 MHz
Note: For the external trigger output, the trigger source is
the programmable Synchronous Signal.
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