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Asynchronous Serial Interface (UARTA)
Chapter 16
Preliminary User’s Manual U17566EE1V2UM00
(1)
UAnCTL0 - UARTAn control register 0
The UAnCTL0 register is an 8-bit register that controls the UARTAn serial
transfer operation.
Access
This register can be read/written in 8-bit or 1-bit units.
Address
<base>
Initial Value
10
H
. This register is cleared by any reset.
7
6
5
4
3
2
1
0
UAnPWR UAnTXE UAnRXE
UAnDIR
UAnPS1
UAnPS0
UAnCL
UAnSL
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 16-3
UAnCTL0 register contents (1/2)
Bit position
Bit name
Function
7
UAnPWR
UARTAn operation disable/enable:
0: Disable UARTAn operation and reset the UARTAn asynchroneously
1: Enable UARTAn operation
The UARTAn operation is controlled by the UAnPWR bit. The TXDAn pin output is
fixed to high level by clearing the UAnPWR bit to 0 (fixed to low level if
UAnOPT0.UAnTDL bit = 1).
6
UAnTXE
Transmit operation disable/enable:
0: Disable transmit operation
1: Enable transmit operation
•
To start transmission, set the UAnPWR bit to 1 and then set the UAnTXE bit
to 1.
•
To stop transmission, clear the UAnTXE bit to 0 and then the UAnPWR bit to
0.
•
To initialize the transmission unit, clear UAnTXE bit to 0, wait for two cycles of
the base clock, and then set UAnTXE bit to 1 again. Otherwise, initialization
may not be executed.
5
UAnRXE
Receive operation disable/enable:
0: Disable receive operation
1: Enable receive operation
•
To start reception, set the UAnPWR bit to 1 and then set the UAnRXE bit to 1.
•
To stop reception, clear the UAnRXE bit to 0 and then the UAnPWR bit to 0.
•
To initialize the reception unit, clear UAnRXE bit to 0, wait for two cycles of the
base clock, and then set UAnRXE bit to 1 again. Otherwise, initialization may
not be executed.
4
UAnDIR
Transfer direction mode specification (MSB/LSB):
0: MSB first transfer
1: LSB first transfer
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