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Watchdog Timer (WDT)
Chapter 15
Preliminary User’s Manual U17566EE1V2UM00
15.2 Watchdog Timer Registers
The Watchdog Timer is controlled by means of the following registers:
The registers WDCS and WDTM are protected against accidental changes. A
special write procedure, employing the WCMD register, ensures that these
registers are not easily rewritten in case of a program hang-up.
Their contents can only be changed after a reset.
In addition, the registers are write-protected when the timer is running. Their
protection status is indicated in the WDTM register.
Note
Only byte access is supported for the registers WDCS, WCMD and WDTM.
The registers are allocated at even addresses. Thus, they cannot be written by
a consecutive byte write sequence or a consecutive half word or word write
sequence.
Table 15-1
Watchdog Timer registers overview
Register name
Shortcut
Address
Watchdog Timer clock selection register
WDCS
<base>
Watchdog Timer command protection register
WCMD
<base> + 2
H
Watchdog Timer mode register
WDTM
<base> + 4
H
Watchdog Timer command status register
WPHS
<base> + 6
H
Table 15-2
WDT register base address
Timer
Base address
WDT
FFFF F6C0
H
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