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32
Chapter 1
Introduction
Preliminary User’s Manual U17566EE1V2UM00
Figure 1-2
provides a functional block diagram of the V850E/DL3 µPD70F3427
microcontroller.
Figure 1-2
V850E/DL3 µPD70F3427 block diagram
Bus
Control
Unit
NPB (NEC Peripheral Bus)
CPU Core
Power supply
Interrupt
Controller
NMI
2 x UARTA
RXDA0, RXDA1
TXDA0, TXDA1
3 x CSIB
SIB0, SIB1, SIB2
SOB0, SOB1, SOB2
SCKB0, SCKB1, SCKB2
Ports
P00
to
P07
P16
to
P17
P90
to
P97
P80
to
P87
P70
to
P715
P60
to
P67
P50
to
P57
P40
to
P47
P30
to
P37
P20
to
P27
BRG
BRG
DMA
RAM
P100
to
P107
P1
10
to
P1
17
P120
to
P127
P130
to
P137
DMS
DDI
DDO
DCK
DRST
N-Wire
debug I/F
16-bit Timer
WCT
Watch
and
Watch Correction
Timer
16-bit Timer
WT
Watchdog
Timer
2 x CAN
CRXD0, CRXD1
CTXD0, CTXD1
Sound
Generator
SGOA
SGO/SGOF
10-bit ADC
16
channels
ANI0-ANI15
16-bit Timer
TMG0 - TMG2
16-bit Timer
TMP0 - TMP3
TIP00, TIP01
TIP10, TIP11
TIP20, TIP21
TIP30, TIP31
TOP00, TOP01
TOP10, TOP11
TOP20, TOP21
TOP30, TOP31
2 x I
2
C
SDA0, SDA1
SCL0, SCL1
VCMP0, VCMP1
2 x Voltage
Comparator
VCMPO0, VCMPO1
RESET
Clock Generator
XT1
XT2
Sub oscillator
Ring oscillator
FOUT
Main and
Sub oscillator
Supervision
Clock Generator
Memory
Power and Reset
Serial Interfaces
Control Interfaces
Timers
Auxiliary Functions
Bus
Bridge
System Controller
Standby Controller
On-Chip Debug Unit
ROM
Correction
CPU
Reset
POC
FOUT
Flash
INTP0 to INTP7
16-bit Timer
TMZ0 - TMZ9
X1
X2
Main oscillator
Spread Spectrum PLL
PLL
Memory
Controller
BCLK
WAIT
A0 to A23
D16 to D31
WR
RD
BE3 to BE0
CS3, CS4
CS0, CS1
D0 to D15
P140 to P142
TIG01 to TIG04
TIG11 to TIG14
TIG20 to TIG25
TOG01 to TOG04
TOG11 to TOG14
TOG21 to TOG24
LCD Bus I/F
DBWR
DBD0 to DBD7
DBRD
SM41 to SM44
SM11 to SM14
SM21 to SM24
SM31 to SM34
SM61 to SM64
SM51 to SM54
Stepper
Motor
C/D
electronic components distributor