383
16-bit Timer/Event Counter P (TMP)
Chapter 11
Preliminary User’s Manual U17566EE1V2UM00
(b) 0%/100% output of PWM waveform
To output a 0% waveform, set the TPnCCR1 register to 0000H. If the set
value of the TPnCCR0 register is FFFFH, the INTTPnCC1 signal is
generated periodically.
To output a 100% waveform, set a value of (set value of TPnCCR0 register
+ 1) to the TPnCCR1 register. If the set value of the TPnCCR0 register is
FFFFH, 100% output cannot be produced.
Co
u
nt clock
16-
b
it co
u
nter
TPnCE
b
it
TPnCCR0 regi
s
ter
TPnCCR1 regi
s
ter
INTTPnCC0
s
ign
a
l
INTTPnCC1
s
ign
a
l
TOPn1 pin o
u
tp
u
t
D
0
0000H
D
0
0000H
D
0
0000H
D
0
−
1
D
0
0000
FFFF
0000
D
0
−
1
D
0
0000
0001
Co
u
nt clock
16-
b
it co
u
nter
TPnCE
b
it
TPnCCR0 regi
s
ter
TPnCCR1 regi
s
ter
INTTPnCC0
s
ign
a
l
INTTPnCC1
s
ign
a
l
TOPn1 pin o
u
tp
u
t
D
0
D
0
+ 1
D
0
D
0
+ 1
D
0
D
0
+ 1
D
0
−
1
D
0
0000
FFFF
0000
D
0
−
1
D
0
0000
0001
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