Motorola MPC860 PowerQUICC, Руководство пользователя

Страница: 893 / 1106

MOTOROLA Chapter 34. Parallel I/O Ports 34-11
Part V. The Communications Processor Module
Table 34-9 describes PBDIR bits.
34.3.1.4 Port B Pin Assignment Register (PBPAR)
The port B pin assignment register (PBPAR) conÞgures signals as general-purpose I/O or
dedicated for use with a peripheral.
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field Ñ DR14 DR15
Reset Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ 0 0
R/W Ñ R/W R/W
Addr 0xAB8
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field DR16 DR17 DR18 DR19 DR20 DR21 DR22 DR23 DR24 DR25 DR26 DR27 DR28 DR29 DR30 DR31
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr 0xABA
Figure 34-9. Port B Data Direction Register (PBDIR)
Table 34-9. PBDIR Bit Descriptions
Bits Name Description
0Ð13 Ñ Reserved
14Ð31 DR n Port B data direction. ConÞgures port B signals as inputs or outputs when functioning as
general-purpose I/O; otherwise, used to select the peripheral function.
0 Select the signal for general-purpose input, or select peripheral function 0.
1 Select the signal for general-purpose output, or select peripheral function 1.
DR14 and DR15 are ignored when port B is used by the PIP controller.
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Field Ñ DD14 DD15
Reset Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ Ñ 0 0
R/W Ñ R/W R/W
Addr 0xABC
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Field DD16 DD17 DD18 DD19 DD20 DD21 DD22 DD23 DD24 DD25 DD26 DD27 DD28 DD29 DD30 DD31
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Addr 0xABE
Figure 34-10. Port B Pin Assignment Register (PBPAR)