Atmel SAM4S Series, Предварительный информационный лист

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140
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
11.6.6.5 SMLAL and SMLALD
Signed Multiply Accumulate Long, Signed Multiply Accumulate Long (halfwords) and Signed
Multiply Accumulate Long Dual.
Syntax
op{cond} RdLo, RdHi, Rn, Rm
op{XY}{cond} RdLo, RdHi, Rn, Rm
op{X}{cond} RdLo, RdHi, Rn, Rm
where:
Operation
The
SMLAL
instruction:
• Multiplies the two’s complement signed word values from
Rn
and
Rm
.
• Adds the 64-bit value in
RdLo
and
RdHi
to the resulting 64-bit product.
• Writes the 64-bit result of the multiplication and addition in
RdLo
and
RdHi
.
The
SMLALBB
,
SMLALBT
,
SMLALTB
and
SMLALTT
instructions:
• Multiplies the specified signed halfword, Top or Bottom, values from
Rn
and
Rm
.
• Adds the resulting sign-extended 32-bit product to the 64-bit value in
RdLo
and
RdHi
.
• Writes the 64-bit result of the multiplication and addition in
RdLo
and
RdHi
.
The non-specified halfwords of the source registers are ignored.
The
SMLALD
and
SMLALDX
instructions interpret the values from
Rn
and
Rm
as four halfword two’s
complement signed 16-bit integers. These instructions:
• if
X
is not present, multiply the top signed halfword value of
Rn
with the top signed halfword of
Rm
and the bottom signed halfword values of
Rn
with the bottom signed halfword of
Rm
.
• Or if
X
is present, multiply the top signed halfword value of
Rn
with the bottom signed halfword
of
Rm
and the bottom signed halfword values of
Rn
with the top signed halfword of
Rm
.
op is one of:
SMLAL Signed Multiply Accumulate Long
SMLAL Signed Multiply Accumulate Long (halfwords, X and Y)
X and Y specify which halfword of the source registers
Rn
and
Rm
are used as the first
and second multiply operand:
If
X
is
B
, then the bottom halfword, bits [15:0], of
Rn
is used.
If X is T , then the top halfword, bits [31:16], of Rn is used.
If
Y
is
B
, then the bottom halfword, bits [15:0], of
Rm
is used.
If Y is T , then the top halfword, bits [31:16], of Rm is used.
SMLALD Signed Multiply Accumulate Long Dual
SMLALDX Signed Multiply Accumulate Long Dual Reversed
If the
X
is omitted, the multiplications are bottom × bottom and top × top.
If X is present, the multiplications are bottom × top and top × bottom.
cond is an optional condition code, see “Conditional Execution” .
RdHi, RdLo
are the destination registers.
RdLo
is the lower 32 bits and
RdHi
is the upper 32 bits of the 64-bit integer.
For SMLAL , SMLALBB , SMLALBT , SMLALTB , SMLALTT , SMLALD and SMLALDX, they also hold
the accumulating value.
Rn, Rm are registers holding the first and second operands.