636
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
31.6
Product Dependencies
31.6.1
I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the SPI pins to their peripheral
functions.
31.6.2
Power Management
The SPI may be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the SPI clock.
31.6.3
Interrupt
The SPI interface has an interrupt line connected to the Interrupt Controller. Handling the SPI
interrupt requires programming the interrupt controller before configuring the SPI.
Table 31-1.
I/O Lines
Instance
Signal
I/O Line
Peripheral
SPI
MISO
PA12
A
SPI
MOSI
PA13
A
SPI
NPCS0
PA11
A
SPI
NPCS1
PA9
B
SPI
NPCS1
PA31
A
SPI
NPCS1
PB14
A
SPI
NPCS1
PC4
B
SPI
NPCS2
PA10
B
SPI
NPCS2
PA30
B
SPI
NPCS2
PB2
B
SPI
NPCS3
PA3
B
SPI
NPCS3
PA5
B
SPI
NPCS3
PA22
B
SPI
SPCK
PA14
A
Table 31-2.
Peripheral IDs
Instance
ID
SPI
21
Содержание SAM4S Series
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Страница 1145: ...1145 11100B ATARM 31 Jul 12 SAM4S Series Preliminary Figure 43 5 64 lead QFN Package Drawing ...